SPRADP6A February   2025  – May 2025 AM2612 , AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM263P2 , AM263P2-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Power Net Checks
    1. 2.1 Verify Proper AM26x Power Rail Voltage Levels
    2. 2.2 Verify Maximum Current Loading
    3. 2.3 AM26x Power Sequencing
    4. 2.4 AM26x Power Topology References
  6. 3Device Boot Status
    1. 3.1 AM26x SOP Pin Status
    2. 3.2 SOP Boot Mode Latch Timing
    3. 3.3 AM26x SOP Pin Isolation
  7. 4Verify UART Output
    1. 4.1 Configure AM26x for UART Boot
    2. 4.2 Configure Host PC for UART Boot Validation
  8. 5Verify JTAG Connection
    1. 5.1 Configure AM26x for JTAG
    2. 5.2 Configure Host PC for JTAG Debug
    3. 5.3 Test the JTAG Connection
    4. 5.4 Connect to the AM26x R5F Core
  9. 6Loading and Executing a Code Example
    1. 6.1 Importing, Building, and Loading the Project
  10. 7Summary
  11. 8References
  12. 9Revision History

3.1 AM26x SOP Pin Status

AM26x microcontrollers have four SOP (Start-On-Power) pins that configure the device boot mode. Each SOP pin must be held in a valid logic state; 3.3V (1) or GND (0) using external pull resistors. The pin assignments on each AM26x device are shown in Table 3-1.

Table 3-1 SOP and Functional Mode Signal Mapping
SOP Mode Signal Primary Pinmux Signal AM26x
ZCZ Pin		 AM261x
ZFG Pin		 AM261x
ZNC Pin		 AM261x
ZEJ Pin
SOP[0] OSPI0/QSPI0_D0 N1 R2 N2 M2
SOP[1] OSPI0/QSPI_D1 N4 R1 N1 N1
SOP[2] SPI0_CLK A11 A13 A12 A12
SOP[3] SPI0_D0 C10 B12 B12 A10

The boot mode options for each AM26x device are shown in the tables below.

Table 3-2 AM263x Boot Modes
Boot Mode SOP[3] SOP[2] SOP[1] SOP[0]
QSPI (4S) - Quad Read Mode 0 0 0 0
UART 0 0 0 1
QSPI (1S) - Single Read Mode 0 0 1 0
QSPI (4S) - Quad Read UART Fallback Mode 0 1 0 0
QSPI (1S) - Single Read UART Fallback Mode 0 1 0 1
DevBoot 1 0 1 1
Unsupported Boot Mode All other combinations not defined above
Table 3-3 AM263Px Boot Modes
Boot Mode SOP[3] SOP[2] SOP[1] SOP[0]
QSPI(4S), 50MHz - Quad Read UART Fallback Mode 0 0 0 0
UART 0 0 0 1
QSPI(1S), 50MHz - Single Read UART Fallback Mode 0 0 1 0
OSPI(8S), 50MHz - Octal Read UART Fallback Mode 0 0 1 1
xSPI (1S->8D) , 25MHz, SFDP 1 1 0 0
DevBoot 1 0 1 1
Unsupported Boot Mode All other combinations not defined above.
Table 3-4 AM261x Boot Modes
Boot Mode SOP[3] SOP[2] SOP[1] SOP[0]
OSPI-OSPI (4S), 50MHz - Quad Read UART Fallback Mode 0 0 0 0
UART, XMODEM, 115200bps 0 0 0 1
OSPI-OSPI (1S), 50MHz - Single Read UART Fallback Mode 0 0 1 0
OSPI (8S), SDR, 33MHz - Octal Read UART Fallback Mode 0 0 1 1
DevBoot 1 0 1 1
xSPI (1S->8D), 20MHz, SFDP 1 1 0 0
USB DFU - USB with UART Fallback Mode 1 1 1 0
Unsupported Boot Mode All other combinations not defined above.