SPRADP6A February   2025  – May 2025 AM2612 , AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM263P2 , AM263P2-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Power Net Checks
    1. 2.1 Verify Proper AM26x Power Rail Voltage Levels
    2. 2.2 Verify Maximum Current Loading
    3. 2.3 AM26x Power Sequencing
    4. 2.4 AM26x Power Topology References
  6. 3Device Boot Status
    1. 3.1 AM26x SOP Pin Status
    2. 3.2 SOP Boot Mode Latch Timing
    3. 3.3 AM26x SOP Pin Isolation
  7. 4Verify UART Output
    1. 4.1 Configure AM26x for UART Boot
    2. 4.2 Configure Host PC for UART Boot Validation
  8. 5Verify JTAG Connection
    1. 5.1 Configure AM26x for JTAG
    2. 5.2 Configure Host PC for JTAG Debug
    3. 5.3 Test the JTAG Connection
    4. 5.4 Connect to the AM26x R5F Core
  9. 6Loading and Executing a Code Example
    1. 6.1 Importing, Building, and Loading the Project
  10. 7Summary
  11. 8References
  12. 9Revision History

5.1 Configure AM26x for JTAG

To configure the AM26x device for JTAG debug, set the SOP[3:0] pins to 1011. The boot mode setting for JTAG debug, referred to as DevBoot is the same for all AM26x devices.

Connect the AM26x JTAG pins (TDI, TDO, TMS, TCK) to a JTAG emulator such as the XDS110 JTAG Debug Probe or similar hardware debugger platform, and connect the debugger to a host PC.