TIDUF68A February 2024 – March 2025
The phase currents in phase A and phase B are measured inline through a 1mΩ shunt, for example R26 for phase B, as Figure 3-3 shows. R26 is directly connected to the switch node output (SW pin) of the LMG2100 GaN-FET device. The shunt is connected through a Kelvin connection and optional, differential RC low-pass filter (R30, R31, and C53) to the differential inputs IN+ and IN– of the INA241A3 device. In this design, the low-pass filter is not required and the two series resistors were selected as 0Ω and the capacitor C53 was not populated on all three phases. The INA241A3 device has a fixed gain of 50V / V. To convert the bipolar input voltage across the shunt into a unipolar output voltage that is a good fit for an ADC with a 3.3V input voltage range, the mid-voltage of the INA241A3 (U6) is set to 1.65V. To achieve this conversion, a precision, low-drift 3.3V reference REF3333 is connected through an optional RC low-pass filter (R32 and C54) to the REF1 pin. The REF2 pin is connected to GND. In the default setting of this design, the low-pass filter is not used and R32 is set to 0Ω, which is the same on phase A. An internal, precision divide-by-2 function in the INA241 device creates a precision, ultra-low drift, 1.65V bias voltage at the INA241 OUT pin. Use Equation 1 to calculate the transfer function.
The maximum phase current range is from ±33A. The corresponding output voltage ranges from 0V to 3.3V with 1.65V representing a 0A phase current.