TIDUF68A February   2024  – March 2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 LMG2100
      2. 2.3.2 INA241A
      3. 2.3.3 AMC0106M05
      4. 2.3.4 LMR38010
  9. 3System Design Theory
    1. 3.1 Three-Phase GaN Inverter Power Stage
      1. 3.1.1 LMG2100 GaN Half-Bridge Power Stage
    2. 3.2 Inline Shunt Precision Phase-Current Sensing
      1. 3.2.1 INA241A Ultra-Precise Current Sense Amplifier with Enhanced PWM Rejection
      2. 3.2.2 AMC0106M05 Precision, ±50mV Input, Functionally Isolated, Delta-Sigma Modulator
    3. 3.3 Phase Voltage and DC Input Voltage Sensing
    4. 3.4 Power-Stage PCB Temperature Monitor
    5. 3.5 Power Management
      1. 3.5.1 48V to 5V DC/DC Converter
      2. 3.5.2 5V to 3.3V Rail
    6. 3.6 Interface to Host MCU
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
      1. 4.1.1 TIDA-010936 PCB Overview
      2. 4.1.2 TIDA-010936 Jumper Settings
      3. 4.1.3 Interface to C2000™ MCU LaunchPad™ Development Kit
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
      1. 4.4.1 Power Management and System Power Up and Power Down
      2. 4.4.2 GaN Inverter Half-Bridge Module Switch Node Voltage
        1. 4.4.2.1 Switch Node Voltage Transient Response at 48V DC Bus
          1. 4.4.2.1.1 Output Current at ±1A
          2. 4.4.2.1.2 Output Current at ±10A
        2. 4.4.2.2 Impact of PWM Frequency to DC-Bus Voltage Ripple
        3. 4.4.2.3 Efficiency Measurements
        4. 4.4.2.4 Thermal Analysis
        5. 4.4.2.5 No Load Loss Test (COSS Losses)
      3. 4.4.3 Phase-Current Sensing
  11. 5Design and Documentation Support
    1. 5.1 Design Files [Required Topic]
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
        1. 5.1.3.1 Layout Prints
      4. 5.1.4 Altium Project
      5. 5.1.5 Gerber Files
      6. 5.1.6 Assembly Drawings
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author
  13. 7Recognition
  14. 8Revision History

3.1 Three-Phase GaN Inverter Power Stage

The nominal 48V DC input voltage is buffered with six 10F ceramic capacitors to get a total of 60μF DC-bus capacitance. A 1mΩ, 3W shunt resistor is added in series to provide an option to monitor the DC-bus current for overcurrent protection using a high-common mode input voltage comparator INA310A. The PCB employs two separated ground planes: the power ground (PGND) and the logic or analog ground (GND). Both ground planes are connected in a star configuration through a net tie and two optional 0Ω resistors to minimize the crosstalk of high switching frequency currents in the power ground plane into the logic plane.

TIDA-010936 DC-Bus Decoupling and GND Scheme Figure 3-1 DC-Bus Decoupling and GND Scheme