TIDUFA5 December 2024
Figure 3-16 shows the schematic of the data and power connector placed on the board. Two sets of connectors are placed on the board to connect to the TX + RX AFE board. Multiple signals are also coming from the FPGA to communicate with the FX3 device. A clock signal named DC_DC_CLK 1 of 1MHz frequency comes from the FPGA to be the source clock for the power supply clock synchronization. Different power rails are distributed among the connectors for ease of layout and keeping the routing length short. The high-voltage rails are put separately on two connectors providing equal lengths and separation. The connectors are also routed along the edge of the board to keep the connectors away from sensitive circuitry. The connector used is the Panasonic AXK5S80347YG.