TIDUFB3 July   2025

1.   1
2.   Description
3.   Resources
4.   Features
5.   Applications
6.   6
7. 1System Description
   1. 1.1 Key System Specifications
8. 2System Overview
   1. 2.1 Block Diagram
   2. 2.2 Design Considerations
   3. 2.3 Highlighted Products
      1. 2.3.1 TPS7H5006-SEP
      2. 2.3.2 TPS7H6025-SEP
      3. 2.3.3 TPS7H1111-SEP
      4. 2.3.4 TPS7H4010-SEP
      5. 2.3.5 TPS73801-SEP
      6. 2.3.6 TPS7H3302-SEP
      7. 2.3.7 TPS7H3014-SEP
      8. 2.3.8 TPS7H2221-SEP
      9. 2.3.9 SN54SC6T14-SEP
9. 3System Design Theory
   1. 3.1 0V8 Discrete Buck Regulator (VCCINT)
      1. 3.1.1 VCCINT Load Step
   2. 3.2 Buck Regulators (Integrated)
      1. 3.2.1 1V2
      2. 3.2.2 1V2_VCCO
      3. 3.2.3 1V2_MEM
      4. 3.2.4 2V5_DDR_VPP
      5. 3.2.5 3V3_VCCO
   3. 3.3 Linear Regulators
      1. 3.3.1 DDR Termination
      2. 3.3.2 0V92
      3. 3.3.3 1V5_GTY
      4. 3.3.4 1V5
      5. 3.3.5 5V0_SYS
   4. 3.4 Sequencing
      1. 3.4.1 TPS7H3014-SP Sequencer
      2. 3.4.2 TPS7H2221-SEP Discharge Circuit
      3. 3.4.3 VCCINT Discharge Circuit
10. 4Hardware, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Test Setup
    3. 4.3 Test Results
       1. 4.3.1 Discrete Buck Regulator (VCCINT)
          1. 4.3.1.1 0V8
       2. 4.3.2 Buck Regulators (Integrated)
          1. 4.3.2.1 1V2
          2. 4.3.2.2 1V2_VCCO
          3. 4.3.2.3 1V2_MEM
          4. 4.3.2.4 2V5_DDR_VPP
          5. 4.3.2.5 3V3_VCCO
       3. 4.3.3 Linear Regulators
          1. 4.3.3.1 0V6_VTT
          2. 4.3.3.2 0V92
          3. 4.3.3.3 1V5_GTY
          4. 4.3.3.4 1V5
          5. 4.3.3.5 5V0_SYS
11. 5Design and Documentation Support
    1. 5.1 Design Files
       1. 5.1.1 Schematics
       2. 5.1.2 BOM
       3. 5.1.3 Layout Prints
    2. 5.2 Documentation Support
    3. 5.3 Support Resources
    4. 5.4 Trademarks
12. 6About the Author