TIDUFE5 July   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Terminology
    2. 1.2 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1  TMS320F2800137
      2. 2.3.2  LMG3651R025
      3. 2.3.3  LMG2650
      4. 2.3.4  TMCS1126
      5. 2.3.5  ISO6721
      6. 2.3.6  UCC28881
      7. 2.3.7  UCC27712
      8. 2.3.8  TPS562206
      9. 2.3.9  TLV9062
      10. 2.3.10 TLV74033
  9. 3System Design Theory
    1. 3.1 Totem Pole PFC
      1. 3.1.1 Inductor Ratings
      2. 3.1.2 AC Voltage Sensing
      3. 3.1.3 DC Link Voltage Sensing
      4. 3.1.4 AC Current Sensing
      5. 3.1.5 DC Link Capacitor Rating
    2. 3.2 Three-Phase PMSM Drive
      1. 3.2.1 Field Oriented Control of PM Synchronous Motor
        1. 3.2.1.1 Space Vector Definition and Projection
        2. 3.2.1.2 Clarke Transformation
        3. 3.2.1.3 Park Transformation
        4. 3.2.1.4 Basic Scheme of FOC for AC Motor
        5. 3.2.1.5 Rotor Flux Position
      2. 3.2.2 Sensorless Control of PM Synchronous Motor
        1. 3.2.2.1 Enhanced Sliding Mode Observer With Phase Locked Loop
          1. 3.2.2.1.1 Mathematical Model and FOC Structure of an IPMSM
          2. 3.2.2.1.2 Design of ESMO for the IPMSM
          3. 3.2.2.1.3 Rotor Position and Speed Estimation With PLL
      3. 3.2.3 Hardware Prerequisites for Motor Drive
        1. 3.2.3.1 Current Sensing With Three-Shunt
        2. 3.2.3.2 Motor Voltage Feedback
  10. 4Hardware, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
      1. 4.1.1 Hardware Board Overview
      2. 4.1.2 Test Conditions
      3. 4.1.3 Test Equipment Required for Board Validation
    2. 4.2 Test Setup
    3. 4.3 Test Results
      1. 4.3.1 Functional Waveforms
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 Bill of Materials
      3. 5.1.3 Altium Project
      4. 5.1.4 Gerber Files
      5. 5.1.5 PCB Layout Recommendations
    2. 5.2 Tools
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

2.3.3 LMG2650

The LMG2650 is a 650V, 95mΩ, GaN-powered, FET half bridge. The LMG2650 simplifies design, reduces component count, and reduces board space by integrating half-bridge power FETs, gate drivers, bootstrap diodes, and high-side gate-drive level shifters in a 6mm by 8mm QFN package. Programmable turn-on slew rates provide EMI and ringing control. The high-side gate-drive signal level shifter reliably transmits the INH pin signal to the high-side gate driver in challenging power switching environments. The smart-switched GaN bootstrap FET has no diode forward-voltage drop, avoids overcharging the high-side supply, and has zero reverse-recovery charge. The LMG2650 protection features include FET turn-on interlock, undervoltage lockout (UVLO), cycle-by-cycle current limit, and overtemperature shut down. The ultra-low slew rate setting supports motor drive applications.