High performance multicore DSP+Arm - 2x Arm A15 cores, 4x C66x DSP cores
Product details
Parameters
Features
- Eight TMS320C66x DSP Core Subsystems (C66x CorePacs), Each With
- 1.0 GHz or 1.2 GHz C66x Fixed- and Floating-Point DSP Core
- 38.4 GMacs/Core for Fixed Point @ 1.2 GHz
- 19.2 GFlops/Core for Floating Point @ 1.2 GHz
- Memory
- 32-KB L1P Per CorePac
- 32-KB L1D Per CorePac
- 1024-KB Local L2 Per CorePac
- 1.0 GHz or 1.2 GHz C66x Fixed- and Floating-Point DSP Core
- ARM CorePac
- Four ARM® Cortex®-A15 MPCore™ Processors at up to 1.4 GHz
- 4MB of L2 Cache Memory Shared by Four ARM Cores
- Full Implementation of ARMv7-A Architecture Instruction Set
- 32-KB L1 Instruction and Data Caches per Core
- AMBA 4.0 AXI Coherency Extension (ACE) Master Port, Connected to MSMC for Low-Latency Access to Shared MSMC SRAM
- Multicore Shared Memory Controller (MSMC)
- 6MB of MSM SRAM Memory Shared by Eight DSP CorePacs and One ARM CorePac
- Memory Protection Unit (MPU) for Both MSM SRAM and DDR3_EMIF
- Multicore Navigator
- 16k Multipurpose Hardware Queues With Queue Manager
- Packet-Based DMA for Zero-Overhead Transfers
- Network Coprocessor
- Packet Accelerator Enables Support for
- Transport Plane IPsec, GTP-U, SCTP, PDCP
- L2 User Plane PDCP (RoHC, Air Ciphering)
- 1-Gbps Wire Speed Throughput at 1.5 MPackets Per Second
- Security Accelerator Engine Enables Support for
- IPSec, SRTP, 3GPP, and WiMAX Air Interface, and SSL/TLS Security
- ECB, CBC, CTR, F8, A5/3, CCM, GCM, HMAC, CMAC, GMAC, AES, DES, 3DES, Kasumi, SNOW 3G, SHA-1, SHA-2 (256-Bit Hash), MD5
- Up to 2.4 Gbps IPSec and 2.4 Gbps Air Ciphering
- Ethernet Subsystem
- Five-Port Switch (Four SGMII Ports)
- Packet Accelerator Enables Support for
- Peripherals
- Four Lanes of SRIO 2.1
- Supports up to 5 GBaud
- Supports Direct I/O, Message Passing
- Two Lanes PCIe Gen2
- Supports up to 5 GBaud
- Two HyperLinks
- Supports Connections to Other KeyStone™ Architecture Devices Providing Resource Scalability
- Supports up to 50 GBaud
- 10-Gigabit Ethernet (10-GbE) Switch Subsystem (66AK2H14 Only)
- Two XFI Ports
- IEEE 1588 Support
- Five Enhanced Direct Memory Access (EDMA) Modules
- Two 72-Bit DDR3/DDR3L Interfaces With Speeds up to 1600 MHz
- EMIF16 Interface
- USB 3.0
- Two UART Interfaces
- Three I2C Interfaces
- 32 GPIO Pins
- Three SPI Interfaces
- Semaphore Module
- 64-Bit Timers
- Twenty 64-Bit Timers for 66AK2H14 and 66AK2H12
- Fourteen 64-Bit Timers for 66AK2H06
- Five On-Chip PLLs
- Four Lanes of SRIO 2.1
- Commercial Case Temperature:
- 0ºC to 85ºC
- Extended Case Temperature:
- –40ºC to 100ºC
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Description
The 66AK2Hxx platform combines the quad ARM Cortex-A15 processor with up to eight TMS320C66x high-performance DSPs using the KeyStone II architecture. The 66AK2H14/12/06 device provides up to 5.6 GHz of ARM and 9.6 GHz of DSP processing coupled with security, packet processing, and Ethernet switching at lower power than multichip solutions. The 66AK2H14/12/06 device is optimal for embedded infrastructure applications like cloud computing, media processing, high-performance computing, transcoding, security, gaming, analytics, and virtual desktop.
The C66x core combines fixed-point and floating-point computational capability in the processor without sacrificing speed, size, or power consumption. The raw computational performance is 38.4 GMACS/core and 19.2 Gflops/core (@ 1.2 GHz operating frequency). The C66x is also 100% backward compatible with software for C64x+ devices. The C66x core incorporates 90 new instructions targeted for floating point (FPi) and vector math oriented (VPi) processing.
The 66AK2H14/12/06 device has a complete set of development tools that includes: a C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows® debugger interface for visibility into source code execution.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
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The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).
The (...)
Features
XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)
Description
The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).
The (...)
Features
-
XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)
Software development
Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos. All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)
Features
Linux features
- Open Linux support
- Linux kernel and Bootloaders
- File system
- GUI-based application launcher
- Example applications, including:
- ARM benchmarks: Dhrystone, Linpack, Whetstone
- Cryptography: AES, 3DES, MD5, SHA
- Host tools including flash utility
- Code Composer Studio™ IDE for Linux development
- (...)
Features
- Supports C66x TI DSP platform for little-endian
- Supports single-precision and double-precision floating point
- Supports complex inputs and real inputs
- Supports 1D, 2D and 3D FFT
- Supports Single-core and Multi-core
- API similar to FFTW, includes FFT plan and FFT execute
Features
- Types of functions included:
- Trigonometric and hyperbolic: Sin, Cos, Tan, Arctan, etc.
- Power, exponential, and logarithmic
- Reciprocal
- Square root
- Division
- Natural C Source Code
- Optimized C code with Intrinsics
- Hand-coded assembly-optimized routines
- C-callable routines, which can be inlined and are fully (...)
Features
Image Analysis
- Image boundry and perimeter
- Morphological operation
- Edge detection
- Image Histogram
- Image thresholding
Image filtering and format conversion
- Color space conversion
- Image convolution
- Image correlation
- Error diffusion
- Median filtering
- Pixel expansion
Image compression and decompression
- Forward and (...)
Features
Optimized DSP routines including functions for:
- Adaptive filtering
- Correlation
- FFT
- Filtering and convolution: FIR, biquad, IIR, convolution
- Math: Dot products, max value, min value, etc.
- Matrix operations
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Features
- Field-hardened and tested
- LINUX and WINDOWS installers
- XDC packaged and validated on a standard EVM in a Codec Engine-based test
- Both encoder and decoder are available
- All codecs are eXpressDSP™ compliant and implement one of the XDM 1.x interfaces
- Performance data specified in each codec Datasheet
Design tools & simulation
Reference designs
Design files
CAD/CAE symbols
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Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
TI E2E™ forums with technical support from TI engineers
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