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Product details

Parameters

DSP 4 C66x Operating system Integrity, Linux, SYS/BIOS, VxWorks On-chip L2 cache/RAM 4096 KB (ARM Cluster), 1024 KB (per C66x DSP core) Other on-chip memory 6144 KB DRAM DDR3, DDR3L Ethernet MAC 4-port 1Gb Switch PCI/PCIe 2 PCIe Gen2 Serial I/O SRIO, I2C, PCIe, SPI, UART, USB, Hyperlink SPI 3 I2C 3 USB 1 Arm MHz (Max.) 1200, 1400 Arm CPU 2 ARM Cortex-A15 UART (SCI) 2 Operating temperature range (C) -40 to 100, 0 to 85 Rating Catalog open-in-new Find other C6000 DSP + Arm processors

Features

  • Eight TMS320C66x DSP Core Subsystems (C66x CorePacs), Each With
    • 1.0 GHz or 1.2 GHz C66x Fixed- and Floating-Point DSP Core
      • 38.4 GMacs/Core for Fixed Point @ 1.2 GHz
      • 19.2 GFlops/Core for Floating Point @ 1.2 GHz
    • Memory
      • 32-KB L1P Per CorePac
      • 32-KB L1D Per CorePac
      • 1024-KB Local L2 Per CorePac
  • ARM CorePac
    • Four ARM® Cortex®-A15 MPCore™ Processors at up to 1.4 GHz
    • 4MB of L2 Cache Memory Shared by Four ARM Cores
    • Full Implementation of ARMv7-A Architecture Instruction Set
    • 32-KB L1 Instruction and Data Caches per Core
    • AMBA 4.0 AXI Coherency Extension (ACE) Master Port, Connected to MSMC for Low-Latency Access to Shared MSMC SRAM
  • Multicore Shared Memory Controller (MSMC)
    • 6MB of MSM SRAM Memory Shared by Eight DSP CorePacs and One ARM CorePac
    • Memory Protection Unit (MPU) for Both MSM SRAM and DDR3_EMIF
  • Multicore Navigator
    • 16k Multipurpose Hardware Queues With Queue Manager
    • Packet-Based DMA for Zero-Overhead Transfers
  • Network Coprocessor
    • Packet Accelerator Enables Support for
      • Transport Plane IPsec, GTP-U, SCTP, PDCP
      • L2 User Plane PDCP (RoHC, Air Ciphering)
      • 1-Gbps Wire Speed Throughput at 1.5 MPackets Per Second
    • Security Accelerator Engine Enables Support for
      • IPSec, SRTP, 3GPP, and WiMAX Air Interface, and SSL/TLS Security
      • ECB, CBC, CTR, F8, A5/3, CCM, GCM, HMAC, CMAC, GMAC, AES, DES, 3DES, Kasumi, SNOW 3G, SHA-1, SHA-2 (256-Bit Hash), MD5
      • Up to 2.4 Gbps IPSec and 2.4 Gbps Air Ciphering
    • Ethernet Subsystem
      • Five-Port Switch (Four SGMII Ports)
  • Peripherals
    • Four Lanes of SRIO 2.1
      • Supports up to 5 GBaud
      • Supports Direct I/O, Message Passing
    • Two Lanes PCIe Gen2
      • Supports up to 5 GBaud
    • Two HyperLinks
      • Supports Connections to Other KeyStone™ Architecture Devices Providing Resource Scalability
      • Supports up to 50 GBaud
    • 10-Gigabit Ethernet (10-GbE) Switch Subsystem (66AK2H14 Only)
      • Two XFI Ports
      • IEEE 1588 Support
    • Five Enhanced Direct Memory Access (EDMA) Modules
    • Two 72-Bit DDR3/DDR3L Interfaces With Speeds up to 1600 MHz
    • EMIF16 Interface
    • USB 3.0
    • Two UART Interfaces
    • Three I2C Interfaces
    • 32 GPIO Pins
    • Three SPI Interfaces
    • Semaphore Module
    • 64-Bit Timers
      • Twenty 64-Bit Timers for 66AK2H14 and 66AK2H12
      • Fourteen 64-Bit Timers for 66AK2H06
    • Five On-Chip PLLs
  • Commercial Case Temperature:
    • 0ºC to 85ºC
  • Extended Case Temperature:
    • –40ºC to 100ºC

All trademarks are the property of their respective owners.

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Description

The 66AK2Hxx platform combines the quad ARM Cortex-A15 processor with up to eight TMS320C66x high-performance DSPs using the KeyStone II architecture. The 66AK2H14/12/06 device provides up to 5.6 GHz of ARM and 9.6 GHz of DSP processing coupled with security, packet processing, and Ethernet switching at lower power than multichip solutions. The 66AK2H14/12/06 device is optimal for embedded infrastructure applications like cloud computing, media processing, high-performance computing, transcoding, security, gaming, analytics, and virtual desktop.

The C66x core combines fixed-point and floating-point computational capability in the processor without sacrificing speed, size, or power consumption. The raw computational performance is 38.4 GMACS/core and 19.2 Gflops/core (@ 1.2 GHz operating frequency). The C66x is also 100% backward compatible with software for C64x+ devices. The C66x core incorporates 90 new instructions targeted for floating point (FPi) and vector math oriented (VPi) processing.

The 66AK2H14/12/06 device has a complete set of development tools that includes: a C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows® debugger interface for visibility into source code execution.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet 66AK2Hxx Multicore DSP+ARM® KeyStone II System-on-Chip (SoC) datasheet (Rev. G) Oct. 09, 2017
* Errata 66AK2Hxx Multicore DSP+ARM KeyStone II SOC Errata (Revs 1.0, 1.1, 2.0, 3.0, 3.1) (Rev. F) Jun. 05, 2018
Application note Implementing an FTP Server on TI 66AK2H Device With RTOS Aug. 17, 2020
Application note Introduction to HVDC Architecture and Solutions for Control and Protection (Rev. A) Jun. 01, 2020
Application note How to Migrate CCS 3.x Projects to the Latest CCS Feb. 06, 2020
User guide ARM Assembly Language Tools v20.2.0.LTS User's Guide (Rev. Y) Feb. 04, 2020
User guide ARM Optimizing C/C++ Compiler v20.2.0.LTS User's Guide (Rev. V) Feb. 04, 2020
Application note Keystone Error Detection and Correction EDC ECC Aug. 12, 2019
Application note Using DSPLIB FFT Implementation for Real Input and Without Data Scaling Jun. 11, 2019
Application note Using Arm ROM Bootloader on Keystone II Devices Jun. 04, 2019
User guide ARM Assembly Language Tools v19.6.0.STS User's Guide (Rev. X) Jun. 03, 2019
User guide ARM Optimizing C/C++ Compiler v19.6.0.STS User's Guide (Rev. U) Jun. 03, 2019
Application note Keystone Multicore Device Family Schematic Checklist May 17, 2019
White paper Sitara Processor Security (Rev. D) May 09, 2019
Application note KeyStone II DDR3 interface bring-up Mar. 07, 2019
User guide ARM Assembly Language Tools v18.12.0.LTS User's Guide (Rev. W) Nov. 19, 2018
User guide ARM Optimizing C/C++ Compiler v18.12.0.LTS User's Guide (Rev. T) Nov. 19, 2018
Application note DDR3 Design Requirements for KeyStone Devices (Rev. C) Jan. 23, 2018
User guide ARM Assembly Language Tools v18.1.0.LTS User's Guide (Rev. U) Jan. 16, 2018
User guide ARM Optimizing C/C++ Compiler v18.1.0.LTS User's Guide (Rev. R) Jan. 16, 2018
User guide ARM Assembly Language Tools v17.9.0.STS User's Guide (Rev. T) Sep. 30, 2017
User guide ARM Optimizing C/C++ Compiler v17.9.0.STS User's Guide (Rev. Q) Sep. 30, 2017
Application note Power Consumption Summary for 66AK2Hx System-on-Chip (SoC) Device Family Sep. 28, 2017
User guide KeyStone II Architecture Universal Serial Bus 3.0 (USB 3.0) (Rev. A) Aug. 21, 2017
Application note Thermal Design Guide for DSP and Arm Application Processors (Rev. B) Aug. 14, 2017
User guide Phase-Locked Loop (PLL) for KeyStone Devices User's Guide (Rev. I) Jul. 26, 2017
User guide ARM Assembly Language Tools v17.6.0.STS User's Guide (Rev. S) Jun. 21, 2017
User guide ARM Optimizing C/C++ Compiler v17.6.0.STS User's Guide (Rev. P) Jun. 21, 2017
Selection guide TI Components for Aerospace and Defense Guide (Rev. E) Mar. 22, 2017
User guide Serializer/Deserializer (SerDes) for KeyStone II Devices User Guide (Rev. A) Jul. 27, 2016
Application note Power Management of KS2 Device (Rev. C) Jul. 15, 2016
User guide ARM Assembly Language Tools v16.9.0.LTS User's Guide (Rev. P) Apr. 30, 2016
User guide ARM Optimizing C/C++ Compiler v16.9.0.LTS User's Guide (Rev. M) Apr. 30, 2016
Application note SERDES Link Commissioning on KeyStone I and II Devices Apr. 13, 2016
White paper Multicore SoCs stay a step ahead of SoC FPGAs Feb. 23, 2016
Application note TI DSP Benchmarking Jan. 13, 2016
Application note Throughput Performance Guide for KeyStone II Devices (Rev. B) Dec. 22, 2015
Application note Keystone II DDR3 Debug Guide Oct. 16, 2015
User guide Enhanced Direct memory Access 3 (EDMA3) for KeyStone Devices User's Guide (Rev. B) May 06, 2015
User guide Multicore Navigator (CPPI) for KeyStone Architecture User's Guide (Rev. H) Apr. 09, 2015
User guide DDR3 Memory Controller for KeyStone II Devices User's Guide (Rev. C) Mar. 27, 2015
White paper TI’s processors leading the way in embedded analytics Mar. 03, 2015
Application note Keystone II DDR3 Initialization Jan. 26, 2015
User guide ARM Assembly Language Tools v5.2 User's Guide (Rev. M) Nov. 05, 2014
User guide ARM Optimizing C/C++ Compiler v5.2 User's Guide (Rev. J) Nov. 05, 2014
User guide Power Sleep Controller (PSC) for KeyStone Devices User's Guide (Rev. C) Sep. 04, 2014
User guide Serial RapidIO (SRIO) for KeyStone Devices User's Guide (Rev. C) Sep. 03, 2014
White paper KeyStone™-II-based processors: 10G Ethernet as an optical interface Aug. 25, 2014
Application note Hardware Design Guide for KeyStone II Devices Mar. 24, 2014
More literature 66AK2Hx KeyStone Multicore DSP+ARM System-on-chips (Rev. A) Nov. 08, 2013
User guide PCI Express (PCIe) for KeyStone Devices User's Guide (Rev. D) Sep. 30, 2013
User guide Debug and Trace for KeyStone II Devices User's Guide Jul. 26, 2013
User guide ARM Bootloader User Guide for KeyStone II Devices Jul. 21, 2013
User guide DSP Bootloader for KeyStone Architecture User's Guide (Rev. C) Jul. 15, 2013
User guide Gigabit Ethernet Switch Subsystem for KeyStone Devices User's Guide (Rev. D) Jul. 03, 2013
User guide C66x CorePac User's Guide (Rev. C) Jun. 28, 2013
User guide Memory Protection Unit (MPU) for KeyStone Devices User's Guide (Rev. A) Jun. 28, 2013
User guide HyperLink for KeyStone Devices User's Guide (Rev. C) May 28, 2013
User guide Security Accelerator (SA) for KeyStone Devices User's Guide (Rev. B) Feb. 05, 2013
More literature Multicore DSPs for High-Performance Video Coding Jan. 22, 2013
User guide Multicore Shared Memory Controller (MSMC) User Guide for KeyStone II Devices Nov. 12, 2012
More literature Industrial Imaging: Applications of the K2H and K2E platforms Nov. 09, 2012
More literature Video Infrastructure - Applications of the K2E, K2H platforms Nov. 09, 2012
User guide ARM CorePac User Guide for KeyStone II Devices Oct. 31, 2012
Application note Multicore Programming Guide (Rev. B) Aug. 29, 2012
User guide Packet Accelerator (PA) for KeyStone Devices User's Guide (Rev. A) Jul. 11, 2012
User guide Serial Peripheral Interface (SPI) for KeyStone Devices User’s Guide (Rev. A) Mar. 30, 2012
User guide Chip Interrupt Controller (CIC) for KeyStone Devices User's Guide (Rev. A) Mar. 27, 2012
User guide 64-Bit Timer (Timer64) for KeyStone Devices User's Guide (Rev. A) Mar. 22, 2012
Application note PCIe Use Cases for KeyStone Devices Dec. 13, 2011
Application note Introduction to TMS320C6000 DSP Optimization Oct. 06, 2011
User guide Inter-Integrated Circuit (I2C) for KeyStone Devices User's Guide Sep. 02, 2011
User guide External Memory Interface (EMIF16) for KeyStone Devices User's Guide (Rev. A) May 24, 2011
White paper Software and Hardware Design Challenges Due to Dynamic Raw NAND Market May 19, 2011
User guide C66x CPU and Instruction Set Reference Guide Nov. 09, 2010
User guide C66x DSP Cache User's Guide Nov. 09, 2010
Application note Clocking Design Guide for KeyStone Devices Nov. 09, 2010
User guide General-Purpose Input/Output (GPIO) forKeyStone Devices User's Guide Nov. 09, 2010
Application note Optimizing Loops on the C66x DSP Nov. 09, 2010
User guide Universal Asynchronous Receiver/Transmitter (UART) for KeyStone Devices UG Nov. 09, 2010
User guide Network Coprocessor for KeyStone Devices User's Guide Nov. 02, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

DEBUG PROBE Download
XDS200 USB Debug Probe
TMDSEMU200-U
295
Description

The Spectrum Digital XDS200 is the first model of the XDS200 family of debug probes (emulators) for TI processors. The XDS200 family features a balance of low cost with good performance between the super low cost XDS110 and the high performance XDS560v2, while supporting a wide variety of standards (...)

Features

The XDS200 is the mid-range family of JTAG debug probes (emulators) for TI processors. Designed to deliver good performance and the most common features that place it between the low cost XDS110 and the high performance XDS560v2, the XDS200 is the balanced solution to debug TI microcontrollers (...)

DEBUG PROBE Download
995
Description

The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

Features

XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

DEBUG PROBE Download
1495
Description

The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

Features
  • XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

Software development

SOFTWARE DEVELOPMENT KIT (SDK) Download
Processor SDK for 66AK2HX Processors - Linux and TI-RTOS support
PROCESSOR-SDK-K2H

Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)

Features

Linux features

  • Open Linux support
  • Linux kernel and Bootloaders
  • File system
  • GUI-based application launcher
  • Example applications, including:
    • ARM benchmarks: Dhrystone, Linpack, Whetstone
    • Cryptography: AES, 3DES, MD5, SHA
  • Host tools including flash utility
  • Code Composer Studio™ IDE for Linux development
  • (...)

DRIVER OR LIBRARY Download
FFT Library for Floating Point Devices
FFTLIB The Texas Instruments FFT library is an optimized floating-point math function library for computing the discrete Fourier transform (DFT).
Features
  • Supports C66x TI DSP platform for little-endian
  • Supports single-precision and double-precision floating point
  • Supports complex inputs and real inputs
  • Supports 1D, 2D and 3D FFT
  • Supports Single-core and Multi-core
  • API similar to FFTW, includes FFT plan and FFT execute
DRIVER OR LIBRARY Download
DSP Math Library for Floating Point Devices
MATHLIB — The Texas Instruments math library is an optimized floating-point math function library for C programmers using TI floating point devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By using these routines instead (...)
Features
  • Types of functions included:
    • Trigonometric and hyperbolic: Sin, Cos, Tan, Arctan, etc.
    • Power, exponential, and logarithmic
    • Reciprocal
    • Square root
    • Division
  • Natural C Source Code
  • Optimized C code with Intrinsics
  • Hand-coded assembly-optimized routines
  • C-callable routines, which can be inlined and are fully (...)
DRIVER OR LIBRARY Download
TMS320C5000/6000 Image Library (IMGLIB)
SPRC264 C5000/6000 Image Processing Library (IMGLIB) is an optimized image/video processing function library for C programmers. It includes C-callable general-purpose image/video processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Features

Image Analysis

  • Image boundry and perimeter
  • Morphological operation
  • Edge detection
  • Image Histogram
  • Image thresholding

Image filtering and format conversion

  • Color space conversion
  • Image convolution
  • Image correlation
  • Error diffusion
  • Median filtering
  • Pixel expansion

Image compression and decompression

  • Forward and (...)
DRIVER OR LIBRARY Download
TMS320C6000 DSP Library (DSPLIB)
SPRC265 TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Features

Optimized DSP routines including functions for:

  • Adaptive filtering
  • Correlation
  • FFT
  • Filtering and convolution: FIR, biquad, IIR, convolution
  • Math: Dot products, max value, min value, etc.
  • Matrix operations
IDE, CONFIGURATION, COMPILER OR DEBUGGER Download
Code Composer Studio (CCS) Integrated Development Environment (IDE) for Multicore Processors
CCSTUDIO-KEYSTONE

Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a suite of tools used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor (...)

SOFTWARE CODEC Download
CODECS- Video, Speech - for C66x-based Devices
C66XCODECS TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. In many cases, the C64x+ codecs are provided and validated for C66x platforms. Datasheets and Release Notes are on the download (...)
Features
  • Field-hardened and tested
  • LINUX and WINDOWS installers
  • XDC packaged and validated on a standard EVM in a Codec Engine-based test
  • Both encoder and decoder are available
  • All codecs are eXpressDSP™ compliant and implement one of the XDM 1.x interfaces
  • Performance data specified in each codec Datasheet
Encode (...)

Design tools & simulation

SIMULATION MODEL Download
SPRM603.ZIP (6 KB) - Power Model
SIMULATION MODEL Download
SPRM609.ZIP (36 KB) - BSDL Model
SIMULATION MODEL Download
SPRM618.ZIP (2189 KB) - IBIS Model
SIMULATION MODEL Download
SPRM649A.ZIP (136 KB) - Power Model
SIMULATION MODEL Download
SPRM743.ZIP (265889 KB) - IBIS-AMI Model
SCHEMATIC Download
SPRR189.ZIP (144 KB)

Reference designs

REFERENCE DESIGNS Download
Implementing a Real-time Synthetic Aperture Radar (SAR) Algorithm on TI’s C6678 DSP Reference Design
TIDEP0045 This TI design shows a real-time synthetic aperture radar (SAR) implementation running on a TI's multicore TMS320C6678 digital signal processor (DSP). One of the main challenges of  SAR is to generate high resolution images in real-time, since forming the image involves computationally (...)
document-generic Schematic
REFERENCE DESIGNS Download
Using TMS320C6678 Processor to Implement Power Efficient Scalable H.265/HEVC Solution Ref Design
TIDEP0037 HEVC is an efficient, but processing intensive video standard, that is said to double the data compression ratio compared to H.264 / MPEG-4 at the same level of video quality. This design shows how a power efficient, soft H.265 / HEVC solution, that scales across resolutions, frame rates & (...)
document-generic Schematic

CAD/CAE symbols

Package Pins Download
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Ordering & quality

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