Product details

Number of channels (#) 1 Total supply voltage (Min) (+5V=5, +/-5V=10) 3 Total supply voltage (Max) (+5V=5, +/-5V=10) 5.25 BW @ Acl (MHz) 2000 Acl, min spec gain (V/V) 2 Slew rate (Typ) (V/us) 6600 Architecture Fully Differential ADC Driver, Bipolar Vn at flatband (Typ) (nV/rtHz) 1.9 Iq per channel (Typ) (mA) 37.7 Rail-to-rail No Vos (offset voltage @ 25 C) (Max) (mV) 4 Operating temperature range (C) -40 to 85 Output current (Typ) (mA) 96 2nd harmonic (dBc) 104 3rd harmonic (dBc) 108 @ MHz 10 GBW (Typ) (MHz) 3000 Input bias current (Max) (pA) 15500000 Features Shutdown, Decompensated CMRR (Typ) (dB) 90 Rating Catalog
Number of channels (#) 1 Total supply voltage (Min) (+5V=5, +/-5V=10) 3 Total supply voltage (Max) (+5V=5, +/-5V=10) 5.25 BW @ Acl (MHz) 2000 Acl, min spec gain (V/V) 2 Slew rate (Typ) (V/us) 6600 Architecture Fully Differential ADC Driver, Bipolar Vn at flatband (Typ) (nV/rtHz) 1.9 Iq per channel (Typ) (mA) 37.7 Rail-to-rail No Vos (offset voltage @ 25 C) (Max) (mV) 4 Operating temperature range (C) -40 to 85 Output current (Typ) (mA) 96 2nd harmonic (dBc) 104 3rd harmonic (dBc) 108 @ MHz 10 GBW (Typ) (MHz) 3000 Input bias current (Max) (pA) 15500000 Features Shutdown, Decompensated CMRR (Typ) (dB) 90 Rating Catalog
VQFN (RGT) 16 9 mm² 3 x 3
  • Fully-Differential Architecture
  • Centered Input Common-Mode Range
  • Output Common-Mode Control
  • Minimum Gain of 2 V/V (6 dB)
  • Bandwidth: 1900 MHz
  • Slew Rate: 6600 V/µs
  • 1% Settling Time: 2 ns
  • HD2: –75 dBc at 100 MHz
  • HD3: –80 dBc at 100 MHz
  • OIP3: 37 dBm at 70 MHz
  • Input Voltage Noise: 1.9 nV/√Hz (f > 10 MHz)
  • Power-Supply Voltage: 3 V to 5 V
  • Power-Supply Current: 37.7 mA
  • Power-Down Current: 0.65 mA
  • APPLICATIONS
    • 5-V Data Acquisition Systems High Linearity ADC Amplifiers
    • Wireless Communication
    • Medical Imaging
    • Test and Measurement

All other trademarks are the property of their respective owners

  • Fully-Differential Architecture
  • Centered Input Common-Mode Range
  • Output Common-Mode Control
  • Minimum Gain of 2 V/V (6 dB)
  • Bandwidth: 1900 MHz
  • Slew Rate: 6600 V/µs
  • 1% Settling Time: 2 ns
  • HD2: –75 dBc at 100 MHz
  • HD3: –80 dBc at 100 MHz
  • OIP3: 37 dBm at 70 MHz
  • Input Voltage Noise: 1.9 nV/√Hz (f > 10 MHz)
  • Power-Supply Voltage: 3 V to 5 V
  • Power-Supply Current: 37.7 mA
  • Power-Down Current: 0.65 mA
  • APPLICATIONS
    • 5-V Data Acquisition Systems High Linearity ADC Amplifiers
    • Wireless Communication
    • Medical Imaging
    • Test and Measurement

All other trademarks are the property of their respective owners

The THS4509 device is a wideband, fully-differential op amp designed for 5-V data acquisition systems. It has a low noise at 1.9 nV/√Hz, and low harmonic distortion of –75 dBc HD2 and –80 dBc HD3 at 100 MHz with 2 VPP, G = 10 dB, and 1-kΩ load. Slew rate is high at 6600 V/µs, and with settling time of 2 ns to 1% (2-V step), it is ideal for pulsed applications. It is designed for a minimum gain of 6 dB, but is optimized for gains of 10 dB.

To allow for DC coupling to analog-to-digital converters (ADCs), its unique output common-mode control circuit maintains the output common-mode voltage within 3-mV offset (typical) from the set voltage, when set within 0.5-V of midsupply, with less than 4-mV differential offset voltage. The common-mode set point is set to midsupply by internal circuitry, which may be overdriven from an external source.

The input and output are optimized for best performance with the common-mode voltages set to midsupply. Along with high performance at low power-supply voltage, this design makes it ideal for high-performance, single-supply 5-V data acquisition systems. The combined performance of the THS4509 in a gain of 10 dB driving the ADS5500 ADC, sampling at 125 MSPS, is 81-dBc SFDR and 69.1-dBc SNR with a –1 dBFS signal at 70 MHz.

The THS4509 is offered in a quad, leadless VQFN-16 package (RGT), and is characterized for operation over the full industrial temperature range from –40°C to +85°C.

The THS4509 device is a wideband, fully-differential op amp designed for 5-V data acquisition systems. It has a low noise at 1.9 nV/√Hz, and low harmonic distortion of –75 dBc HD2 and –80 dBc HD3 at 100 MHz with 2 VPP, G = 10 dB, and 1-kΩ load. Slew rate is high at 6600 V/µs, and with settling time of 2 ns to 1% (2-V step), it is ideal for pulsed applications. It is designed for a minimum gain of 6 dB, but is optimized for gains of 10 dB.

To allow for DC coupling to analog-to-digital converters (ADCs), its unique output common-mode control circuit maintains the output common-mode voltage within 3-mV offset (typical) from the set voltage, when set within 0.5-V of midsupply, with less than 4-mV differential offset voltage. The common-mode set point is set to midsupply by internal circuitry, which may be overdriven from an external source.

The input and output are optimized for best performance with the common-mode voltages set to midsupply. Along with high performance at low power-supply voltage, this design makes it ideal for high-performance, single-supply 5-V data acquisition systems. The combined performance of the THS4509 in a gain of 10 dB driving the ADS5500 ADC, sampling at 125 MSPS, is 81-dBc SFDR and 69.1-dBc SNR with a –1 dBFS signal at 70 MHz.

The THS4509 is offered in a quad, leadless VQFN-16 package (RGT), and is characterized for operation over the full industrial temperature range from –40°C to +85°C.

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Technical documentation

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Type Title Date
* Data sheet THS4509 Wideband, Low-Noise, Low-Distortion, Fully-Differential Amplifier datasheet (Rev. I) PDF | HTML 29 Jul 2016
Analog Design Journal Q3 2009 Issue Analog Applications Journal 24 Sep 2018
Analog Design Journal Q4 2009 Issue Analog Applications Journal 24 Sep 2018
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017
Technical article How to minimize filter loss when you drive an ADC 20 Oct 2016
Application note Design for a Wideband Differential Transimpedance DAC Output (Rev. A) 17 Oct 2016
Application note Fully-Differential Amplifiers (Rev. E) 19 Sep 2016
Technical article Go differential to differentiate your precision design 11 Aug 2016
Technical article How to use a fully differential amplifier as a level shifter 13 Jul 2016
Technical article What you need to know about internal ESD protection on integrated circuits 02 Dec 2015
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 Sep 2010
Analog Design Journal Using fully differential op amps as attenuators, Part 3 04 Oct 2009
Analog Design Journal Using fully differential op amps as attenuators, Part 2 14 Jul 2009
Analog Design Journal Output impedance matching with fully differential operational amplifiers 11 Mar 2009
Analog Design Journal Q1 2009 Issue Analog Applications Journal 11 Mar 2009
Application note Design for a Wideband Differential Transimpedance DAC Output 18 Apr 2008
Analog Design Journal Low-power, high-intercept interface to the ADS5424, 105-MSPS converter 10 Oct 2005
Analog Design Journal Analysis of fully differential amplifiers 11 Mar 2005
Analog Design Journal Fully differential amplifiers applications:Line termination,driving high-speed.. 02 Mar 2005
Application note Noise Analysis for High Speed Op Amps (Rev. A) 17 Jan 2005

Design & development

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ADS6442EVM — ADS6442 Quad-Channel, 14-Bit, 65-MSPS Analog-to-Digital Converter Evaluation Module

The ADS6442EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS6442 device, a quad channel 14-bit 65 MSPS analog to digital converter. The ADC features a configurable serialized LVDS outputs which can be directly deserialized using TI‘s (...)

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Evaluation board

ADS6445EVM — ADS6445 Quad-Channel, 14-Bit, 125-MSPS Analog-to-Digital Converter Evaluation Module

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User guide: PDF
Evaluation board

THS4508EVM — THS4508 evaluation module

THS4508EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4508EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 10 dB and 50 ohm input and (...)

Not available on TI.com
Evaluation board

THS4509EVM — THS4509 evaluation module

THS4509RGT Eval 1 EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4509RGT Eval 1 EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 10dB (...)

Not available on TI.com
Evaluation board

THS4511EVM — THS4511 evaluation module

THS4511EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4511EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 0 dB and 50 ohm input and (...)

Not available on TI.com
Evaluation board

THS4513EVM — THS4513 evaluation module

THS4513EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4513EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 0dB and 50 ohm input and (...)

Not available on TI.com
Evaluation board

THS4520EVM — THS4520 evaluation module

THS4520EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4520EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 0 dB and 50 Ω (...)

Not available on TI.com
Simulation model

THS4509 PSpice Model (Rev. D)

SLOC050D.ZIP (55 KB) - PSpice Model
Simulation model

THS4509 TINA-TI Spice Model (Rev. A)

SLOM151A.ZIP (5 KB) - TINA-TI Spice Model
Simulation model

THS4509 TINA-TI Reference Design (Rev. B)

SLOM152B.TSC (53 KB) - TINA-TI Reference Design
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Calculation tool

TI FDA Calculator

SBOR022.ZIP (1639 KB)
Reference designs

TIDA-00093 — Optimizing THS4509 to Drive High Speed ADCs Reference Design

This reference design shows the ability of the high-speed amplifier, THS4509 to perform single-ended to differential conversion to drive high-speed analog-to-digital converters (ADCs) while maintaining excellent noise and distortion performance. Performance versus input frequency is shown for both (...)
Schematic: PDF
Reference designs

TIDA-00092 — Optimizing LMH6554 to Drive High Speed ADCs

This reference design shows the ability of the high-speed amplifier, LMH6554, to perform single-ended to differential conversion to drive high-speed analog-to-digital converters (ADCs) while maintaining excellent noise and distortion performance. Performance versus input frequency is shown for both (...)
Schematic: PDF
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