The TLV320AIC3263 (also referred to as the
AIC3263) is a flexible, highly-integrated, low-power, low-voltage stereo
audio codec. The AIC3263 features four digital microphone inputs, plus
programmable outputs, PowerTune capabilities, enhanced fully-programmable miniDSP, predefined and
parameterizable signal processing blocks, integrated PLL, and flexible digital audio interfaces.
Extensive register-based control of power, input and output channel configuration, gains, effects,
pin-multiplexing and clocks are included, allowing the device to be precisely targeted to its
application.
The TLV320AIC3263 features two fully-programmable miniDSP cores that
support application-specific algorithms in the record and/or the playback path of the device. The
miniDSP cores are fully software programmable. Targeted miniDSP algorithms, such as active noise
cancellation, acoustic echo cancellation or advanced DSP filtering are loaded into the device after
power-up.
Combined with the advanced PowerTune technology, the device can execute operations from
8kHz mono voice playback to stereo 192kHz DAC playback, making it ideal for portable
battery-powered audio and telephony applications.
The record path of the TLV320AIC3263 covers operations from 8kHz mono to
192kHz stereo recording, and contains programmable input channel configurations which cover
single-ended and differential setups, as well as floating or mixing input signals. It also provides
a digitally-controlled stereo microphone preamplifier and integrated microphone bias. One
application of the digital signal processing blocks is removable of audible noise that may be
introduced by mechanical coupling, such as optical zooming in a digital camera. The record path can
also be configured for up to two stereo Pulse Density Modulation (PDM) interfaces (for instance,
supporting up to 4 digital microphones) typically used at 64Fs or 128Fs.
The playback path offers signal processing blocks for filtering and effects; headphone,
line, receiver, and Class-D speaker output; flexible mixing of DAC; and analog input signals as
well as programmable volume controls. The playback path contains two high-power
DirectPathTM headphone output drivers which eliminate the need for ac
coupling capacitors. A built in charge pump generates the negative supply for the ground centered
headphone drivers. These headphone output drivers can be configured in multiple ways, including
stereo, and mono BTL. In addition, playback audio can be routed to an integrated Class-D speaker
driver or a differential receiver amplifier.
The integrated PowerTune technology allows the device to be tuned to just the right
power-performance trade-off. Mobile applications frequently have multiple use cases requiring very
low-power operation while being used in a mobile environment. When used in a docked environment
power consumption typically is less of a concern while lowest possible noise is important. With
PowerTune the TLV320AIC3263 can address both cases.
The required internal clock of the TLV320AIC3263 can be derived from
multiple sources, including the MCLK pin, the BCLK1 pin, the BCLK2 pin, several general purpose I/O
pins or the output of the internal PLL, where the input to the PLL again can be derived from
similar pins. Although using the internal fractional PLL ensures the availability of a suitable
clock signal, it is not recommended for the lowest power settings. The PLL is highly programmable
and can accept available input clocks in the range of 512kHz to 50MHz. To enable even lower clock
frequencies, an integrated low-frequency clock multiplier can also be used as an input to the
PLL.
The TLV320AIC3263 has a 12-bit SAR ADC converter that supports system
voltage measurements. These system voltage measurements can be sourced from three dedicated analog
inputs (IN1L/AUX1, IN1R/AUX2, or VBAT pins), or, alternatively, an on-chip temperature sensor that
can be read by the SAR ADC.
The device also
features three full Digital Audio Serial Interfaces, each supporting I2S, DSP/TDM, RJF, LJF, and
mono PCM formats. This enables three simultaneous digital playback and record paths to three
independent digital audio buses or chips. Additionally, the general purpose interrupt pins can be
used to connect to a fourth digital audio bus, allowing the end system to easily switch in this
fourth audio bus to one of the three Digital Audio Serial Interfaces. Each of the three Digital
Audio Serial Interfaces can be run using separate power voltages to enable easy integration with
separate chips with different I/O voltages.
The device is available in the 4.81 mm × 4.81 mm × 0.625 mm 81-Ball WCSP (DSBGA) Package.
The TLV320AIC3263 (also referred to as the
AIC3263) is a flexible, highly-integrated, low-power, low-voltage stereo
audio codec. The AIC3263 features four digital microphone inputs, plus
programmable outputs, PowerTune capabilities, enhanced fully-programmable miniDSP, predefined and
parameterizable signal processing blocks, integrated PLL, and flexible digital audio interfaces.
Extensive register-based control of power, input and output channel configuration, gains, effects,
pin-multiplexing and clocks are included, allowing the device to be precisely targeted to its
application.
The TLV320AIC3263 features two fully-programmable miniDSP cores that
support application-specific algorithms in the record and/or the playback path of the device. The
miniDSP cores are fully software programmable. Targeted miniDSP algorithms, such as active noise
cancellation, acoustic echo cancellation or advanced DSP filtering are loaded into the device after
power-up.
Combined with the advanced PowerTune technology, the device can execute operations from
8kHz mono voice playback to stereo 192kHz DAC playback, making it ideal for portable
battery-powered audio and telephony applications.
The record path of the TLV320AIC3263 covers operations from 8kHz mono to
192kHz stereo recording, and contains programmable input channel configurations which cover
single-ended and differential setups, as well as floating or mixing input signals. It also provides
a digitally-controlled stereo microphone preamplifier and integrated microphone bias. One
application of the digital signal processing blocks is removable of audible noise that may be
introduced by mechanical coupling, such as optical zooming in a digital camera. The record path can
also be configured for up to two stereo Pulse Density Modulation (PDM) interfaces (for instance,
supporting up to 4 digital microphones) typically used at 64Fs or 128Fs.
The playback path offers signal processing blocks for filtering and effects; headphone,
line, receiver, and Class-D speaker output; flexible mixing of DAC; and analog input signals as
well as programmable volume controls. The playback path contains two high-power
DirectPathTM headphone output drivers which eliminate the need for ac
coupling capacitors. A built in charge pump generates the negative supply for the ground centered
headphone drivers. These headphone output drivers can be configured in multiple ways, including
stereo, and mono BTL. In addition, playback audio can be routed to an integrated Class-D speaker
driver or a differential receiver amplifier.
The integrated PowerTune technology allows the device to be tuned to just the right
power-performance trade-off. Mobile applications frequently have multiple use cases requiring very
low-power operation while being used in a mobile environment. When used in a docked environment
power consumption typically is less of a concern while lowest possible noise is important. With
PowerTune the TLV320AIC3263 can address both cases.
The required internal clock of the TLV320AIC3263 can be derived from
multiple sources, including the MCLK pin, the BCLK1 pin, the BCLK2 pin, several general purpose I/O
pins or the output of the internal PLL, where the input to the PLL again can be derived from
similar pins. Although using the internal fractional PLL ensures the availability of a suitable
clock signal, it is not recommended for the lowest power settings. The PLL is highly programmable
and can accept available input clocks in the range of 512kHz to 50MHz. To enable even lower clock
frequencies, an integrated low-frequency clock multiplier can also be used as an input to the
PLL.
The TLV320AIC3263 has a 12-bit SAR ADC converter that supports system
voltage measurements. These system voltage measurements can be sourced from three dedicated analog
inputs (IN1L/AUX1, IN1R/AUX2, or VBAT pins), or, alternatively, an on-chip temperature sensor that
can be read by the SAR ADC.
The device also
features three full Digital Audio Serial Interfaces, each supporting I2S, DSP/TDM, RJF, LJF, and
mono PCM formats. This enables three simultaneous digital playback and record paths to three
independent digital audio buses or chips. Additionally, the general purpose interrupt pins can be
used to connect to a fourth digital audio bus, allowing the end system to easily switch in this
fourth audio bus to one of the three Digital Audio Serial Interfaces. Each of the three Digital
Audio Serial Interfaces can be run using separate power voltages to enable easy integration with
separate chips with different I/O voltages.
The device is available in the 4.81 mm × 4.81 mm × 0.625 mm 81-Ball WCSP (DSBGA) Package.