Product details

DSP 4 C66x DSP MHz (Max) 1000, 1200 CPU 32-/64-bit Operating system DSP/BIOS Ethernet MAC 10/100/1000 PCIe 2 PCIe Gen2 Rating Catalog Operating temperature range (C) -40 to 100, 0 to 85
DSP 4 C66x DSP MHz (Max) 1000, 1200 CPU 32-/64-bit Operating system DSP/BIOS Ethernet MAC 10/100/1000 PCIe 2 PCIe Gen2 Rating Catalog Operating temperature range (C) -40 to 100, 0 to 85
FCBGA (CYP) 841 576 mm² 24 x 24
  • Four TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.2GHz
    • 153.6 GMAC/76.8 GFLOP @ 1.2GHz
    • 32KB L1P, 32KB L1D, 1024KB L2 Per Core
    • 2MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • Six Lane SerDes-Based Antenna Interface (AIF2) - Operating at up to 6.144 Gbps
  • Hardware Coprocessors
    • -Enhanced Coprocessor for Turbo Encoding
      -Three Enhanced Coprocessors for Turbo Decoding
      -Four Viterbi Decoders
      -Three Fast Fourier Transform Coprocessors
      -Bit Rate CoProcessor
      -Two Receiver Accelerators for WCDMA
      -Transmitt Accelerator for WCDMA
  • Four Rake Search Accelerators for Chip Rate Processing and Reed-Muller Decoding
  • I2C Interface, 16 GPIO Pins, SPI Interface
  • Eight 64-Bit Timers, Three On-Chip PLLs
  • Four TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.2GHz
    • 153.6 GMAC/76.8 GFLOP @ 1.2GHz
    • 32KB L1P, 32KB L1D, 1024KB L2 Per Core
    • 2MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • Six Lane SerDes-Based Antenna Interface (AIF2) - Operating at up to 6.144 Gbps
  • Hardware Coprocessors
    • -Enhanced Coprocessor for Turbo Encoding
      -Three Enhanced Coprocessors for Turbo Decoding
      -Four Viterbi Decoders
      -Three Fast Fourier Transform Coprocessors
      -Bit Rate CoProcessor
      -Two Receiver Accelerators for WCDMA
      -Transmitt Accelerator for WCDMA
  • Four Rake Search Accelerators for Chip Rate Processing and Reed-Muller Decoding
  • I2C Interface, 16 GPIO Pins, SPI Interface
  • Eight 64-Bit Timers, Three On-Chip PLLs

The TMS320C6670 Multicore Fixed and Floating Point System on Chip is a member of the C66xx SoC family based on TI's new KeyStone Multicore SoC Architecture designed specifically for high performance applications such as software defined radio, emerging broadband and other communications segments. Integrated with four C66x CorePac DSPs, each core runs at 1.0 to 1.20 GHz enabling up to 4.8 GHz. Hardware acceleration provides a highly integrated, power efficient and easy to use platform for implementing a combination of multi-band, multi-standard waveforms, including proprietary air-interfaces. The C6670 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

The TMS320C6670 Multicore Fixed and Floating Point System on Chip is a member of the C66xx SoC family based on TI's new KeyStone Multicore SoC Architecture designed specifically for high performance applications such as software defined radio, emerging broadband and other communications segments. Integrated with four C66x CorePac DSPs, each core runs at 1.0 to 1.20 GHz enabling up to 4.8 GHz. Hardware acceleration provides a highly integrated, power efficient and easy to use platform for implementing a combination of multi-band, multi-standard waveforms, including proprietary air-interfaces. The C6670 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

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Support through a third party

This product does not have ongoing direct design support from TI. For support while working through your design, you may contact one of the following third parties: D3 Engineering, elnfochips, Ittiam Systems, Path Partner Technology, or Z3 Technologies.

Technical documentation

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Type Title Date
* Data sheet TMS320C6670 Multicore Fixed and Floating-Point System-on-Chip datasheet (Rev. D) 07 Mar 2012
* Errata TMS320C6670 Multicore Fixed and Floating-Point SoC Errata (Revision 1.0, 2.0) (Rev. F) 15 May 2014
Application note Keystone Error Detection and Correction EDC ECC (Rev. A) 25 Jun 2021
Application note How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A) 19 May 2021
User guide SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) 01 Jun 2020
Application note Keystone Bootloader Resources and FAQ 29 May 2019
Application note Keystone Multicore Device Family Schematic Checklist 17 May 2019
Application note Hardware Design Guide for KeyStone Devices (Rev. D) 21 Mar 2019
Technical article Bringing the next evolution of machine learning to the edge 27 Nov 2018
Technical article How quality assurance on the Processor SDK can improve software scalability 22 Aug 2018
Application note DDR3 Design Requirements for KeyStone Devices (Rev. C) 23 Jan 2018
Application note Thermal Design Guide for DSP and Arm Application Processors (Rev. B) 14 Aug 2017
User guide Phase-Locked Loop (PLL) for KeyStone Devices User's Guide (Rev. I) 26 Jul 2017
Application note KeyStone I DDR3 Initialization (Rev. E) 28 Oct 2016
Application note Keystone NDK FAQ 03 Oct 2016
White paper A Diverse High Performance Platform for Advanced Driver Assistance System 28 Sep 2016
Technical article Clove: Low-Power video solutions based on Sitara™ AM57x processors 21 Jul 2016
Application note SERDES Link Commissioning on KeyStone I and II Devices 13 Apr 2016
White paper Multicore SoCs stay a step ahead of SoC FPGAs 23 Feb 2016
Technical article TI's new DSP Benchmark Site 08 Feb 2016
User guide Enhanced Direct memory Access 3 (EDMA3) for KeyStone Devices User's Guide (Rev. B) 06 May 2015
User guide Bit Rate Coprocessor (BCP) for KeyStone Devices User's Guide (Rev. A) 27 Apr 2015
User guide Multicore Navigator (CPPI) for KeyStone Architecture User's Guide (Rev. H) 09 Apr 2015
User guide Antenna Interface 2 (AIF2) for KeyStone I Devices User's Guide (Rev. E) 06 Feb 2015
User guide DDR3 Memory Controller for KeyStone I Devices User's Guide (Rev. E) 20 Jan 2015
Application note TI Keystone DSP Hyperlink SerDes IBIS-AMI Models 09 Oct 2014
Application note TI Keystone DSP PCIe SerDes IBIS-AMI Models 09 Oct 2014
User guide Power Sleep Controller (PSC) for KeyStone Devices User's Guide (Rev. C) 04 Sep 2014
User guide Serial RapidIO (SRIO) for KeyStone Devices User's Guide (Rev. C) 03 Sep 2014
More literature KeyStone Lab Manual - Training 05 Jun 2014
User guide System Analyzer User's Guide (Rev. F) 18 Nov 2013
User guide PCI Express (PCIe) for KeyStone Devices User's Guide (Rev. D) 30 Sep 2013
User guide DSP Bootloader for KeyStone Architecture User's Guide (Rev. C) 15 Jul 2013
White paper Accelerating high-performance computing development with Desktop Linux SDK 08 Jul 2013
User guide Gigabit Ethernet Switch Subsystem for KeyStone Devices User's Guide (Rev. D) 03 Jul 2013
User guide C66x CorePac User's Guide (Rev. C) 28 Jun 2013
User guide Memory Protection Unit (MPU) for KeyStone Devices User's Guide (Rev. A) 28 Jun 2013
User guide HyperLink for KeyStone Devices User's Guide (Rev. C) 28 May 2013
User guide Security Accelerator (SA) for KeyStone Devices User's Guide (Rev. B) 05 Feb 2013
Application note SerDes Implementation Guidelines for KeyStone I Devices 31 Oct 2012
Application note Multicore Programming Guide (Rev. B) 29 Aug 2012
User guide TMS320C6000 Assembly Language Tools v 7.4 User's Guide (Rev. W) 21 Aug 2012
User guide TMS320C6000 Optimizing Compiler v 7.4 User's Guide (Rev. U) 21 Aug 2012
User guide Packet Accelerator (PA) for KeyStone Devices User's Guide (Rev. A) 11 Jul 2012
User guide Semaphore2 Hardware Module for KeyStone Devices User's Guide (Rev. A) 24 Apr 2012
User guide Serial Peripheral Interface (SPI) for KeyStone Devices User’s Guide (Rev. A) 30 Mar 2012
User guide Chip Interrupt Controller (CIC) for KeyStone Devices User's Guide (Rev. A) 27 Mar 2012
User guide 64-Bit Timer (Timer64) for KeyStone Devices User's Guide (Rev. A) 22 Mar 2012
White paper Maximizing Multicore Efficiency with Navigator Runtime 23 Feb 2012
User guide Fast Fourier Transform Coprocessor (FFTC) for KeyStone Devices User's Guide (Rev. C) 20 Dec 2011
Application note PCIe Use Cases for KeyStone Devices 13 Dec 2011
User guide Multicore Shared Memory Controller (MSMC) for KeyStone Devices User's Guide (Rev. A) 15 Oct 2011
Application note Introduction to TMS320C6000 DSP Optimization 06 Oct 2011
User guide Debug and Trace for KeyStone I Devices User's Guide (Rev. A) 22 Sep 2011
User guide Inter-Integrated Circuit (I2C) for KeyStone Devices User's Guide 02 Sep 2011
White paper KeyStone Multicore SoC Tool Suite: one platform for all needs 17 Jun 2011
User guide Viterbi-Decoder Coprocessor 2 (VCP2) for KeyStone Devices User's Guide (Rev. A) 10 Jun 2011
More literature TMS320C6670 Breakthrough Performance for Process-Intensive Applications (Rev. B) 09 Jun 2011
Application note TMS320C66x DSP Generation of Devices (Rev. A) 25 Apr 2011
Application note Tuning VCP2 and TCP2 Bit Error Rate Performance 11 Feb 2011
White paper KeyStone Memory Architecture White Paper (Rev. A) 21 Dec 2010
User guide Turbo Decoder Coprocessor 3 (TCP3D) for KeyStone Devices User's Guide 18 Nov 2010
User guide C66x CPU and Instruction Set Reference Guide 09 Nov 2010
User guide C66x DSP Cache User's Guide 09 Nov 2010
Application note Clocking Design Guide for KeyStone Devices 09 Nov 2010
Application note Connecting AIF to FFTC Guide for KeyStone Devices 09 Nov 2010
User guide General-Purpose Input/Output (GPIO) forKeyStone Devices User's Guide 09 Nov 2010
Application note Migrating From AIF1 to AIF2 for KeyStone Devices 09 Nov 2010
Application note Optimizing Loops on the C66x DSP 09 Nov 2010
User guide Turbo Encoder Coprocessor 3 (TCP3E) for KeyStone Devices User's Guide 09 Nov 2010
User guide Universal Asynchronous Receiver/Transmitter (UART) for KeyStone Devices UG 09 Nov 2010
User guide Network Coprocessor for KeyStone Devices User's Guide 02 Nov 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Daughter card

SHELD-3P-DSP-SOMS — Sheldon DSP-FPGA boards

Sheldon Instruments designs and manufactures DSP based, COTS data acquisition and control hardware for PCIe/PCI, PCI104e/PCI104, XMC/PMC, and CompactPCI systems, along with drivers and real time development software for a variety of applications and markets.

Learn more about Sheldon Instruments at (...)
From: Sheldon Instruments, Inc.
Debug probe

TMDSEMU200-U — XDS200 USB Debug Probe

The XDS200 is a debug probe (emulator) used for debugging TI embedded devices.  The XDS200 features a balance of low cost with good performance as compared to the low cost XDS110 and the high performance XDS560v2.  It supports a wide variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a (...)

In stock
Limit: 3
Debug probe

TMDSEMU560V2STM-U — XDS560v2 System Trace USB Debug Probe

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

In stock
Limit: 1
Debug probe

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB & Ethernet Debug Probe

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

In stock
Limit: 1
Development kit

TMDSEVM6670 — TMS320C6670 Evaluation Modules

TMDSEVM6670L | TMDSEVM6670LE | TMDSEVM6670LXE

TMDSEVM6670L - TMS320C6670 Lite Evaluation Module

The TMS320C6670 Lite Evaluation Module (EVM), or TMDSEVM6670L, is an easy-to-use, cost-efficient development tool that is designed to help developers quickly get started with designs using the C6670 (...)

In stock
Limit: 1
Development kit

TMDSEVM6678 — TMS320C6678 Evaluation Modules

TMS320C6678 Lite Evaluation Modules

The TMS320C6678 Lite Evaluation Modules (EVM), are easy-to-use, cost-efficient development tools that help developers quickly get started with designs using the C6678 or C6674 or C6672 multicore DSP. The EVMs include an on-board, single C6678 processor with robust (...)

Interface adapter

HL5CABLE — Hyperlink Cable

A ½ meter long high speed cable to allow interfacing 2 EVMs via their high performance Hyperlink interfaces. EVMs supported are TMDSEVM6670L, TMDSEVM6678L, TMDSEVM6670LE, TMDSEVM6678LE, TMDSEVM6614LXE and TMDSEVM6618LXE.
In stock
Limit: 20
Interface adapter

TMDXEVMPCI — AMC to PCIe Adapter Card

This is a passive adapter card that allows select TI EVMs with a AMC header to be converted to a PCIe x4 lane edge connector so it can be inserted into a desktop PC or any where a PCIe header is utilized. The selected TI EVM must support native PCIe on the DSP. This card is a adapter and requires (...)
In stock
Limit: 2
Driver or library

FFTLIB — FFT Library for Floating Point Devices

The Texas Instruments FFT library is an optimized floating-point math function library for computing the discrete Fourier transform (DFT).
Driver or library

MATHLIB — DSP Math Library for Floating Point Devices

The Texas Instruments math library is an optimized floating-point math function library for C programmers using TI floating point devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By using these routines instead (...)
Driver or library

SPRC264 — TMS320C5000/6000 Image Library (IMGLIB)

C5000/6000 Image Processing Library (IMGLIB) is an optimized image/video processing function library for C programmers. It includes C-callable general-purpose image/video processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Driver or library

SPRC265 — TMS320C6000 DSP Library (DSPLIB)

TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Driver or library

TELECOMLIB — Telecom and Media Libraries - FAXLIB, VoLIB and AEC/AER for TMS320C64x+ and TMS320C55x Processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)
IDE, configuration, compiler or debugger

CCSTUDIO-KEYSTONE — Code Composer Studio (CCS) Integrated Development Environment (IDE) for Multicore Processors

Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a suite of tools used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor, (...)

Software codec

C66XCODECS — CODECS- Video, Speech - for C66x-based Devices

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. In many cases, the C64x+ codecs are provided and validated for C66x platforms. Datasheets and Release Notes are on the download (...)
Software codec

VOCAL-3P-DSPVOIPCODECS — Vocal technologies DSP VoIP codecs

With over 25 years of assembly and C code development, VOCAL modular software suite is available for a wide variety of TI DSPs. Products include ATAs, VoIP servers and gateways, HPNA-based IPBXs, video surveillance, voice and video conferencing, voice and data RF devices, RoIP gateways, secure (...)
From: VOCAL Technologies, Ltd.
Simulation model

TMS320C6670 CYP BSDL Model (Silicon Revision 1.0) (Rev. A)

SPRM531A.ZIP (22 KB) - BSDL Model
Simulation model

TMS320C6670 CYP IBIS Model (Rev. C)

SPRM533C.ZIP (2049 KB) - IBIS Model
Simulation model

C6670 Power Consumption Model

SPRM546.ZIP (56 KB) - Power Model
Simulation model

TMS320C6670 CYP BSDL Model (Silicon Revision 2.0)

SPRM566.ZIP (22 KB) - BSDL Model
Simulation model

KeyStone I SerDes IBIS AMI Models

SPRM742.ZIP (969314 KB) - IBIS Model
Simulation model

TMS320C6670 Thermal Model

SPRR181.ZIP (3 KB) - Thermal Model
Design tool

PROCESSORS-3P-SEARCH — Arm-based MPU, arm-based MCU and DSP third-party search tool

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
Reference designs

TIDEP0011 — Power Solution for C667x DSP AVS Core (CVDD) with Dynamic Voltage Scaling

This reference design aims to supply the AVS core supply (CVDD) in the Keystone Multicore DSPs, mainly the C66x series. The C66x series uses SmartReflex technology to enable the DSP to control its supply voltage. In order to meet this requirement, this design combines a Synchronous Buck Converter (...)
Package Pins Download
FCBGA (CYP) 841 View options

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  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

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