Product details

DSP 1 C64x DSP MHz (Max) 850, 1000, 1200 CPU 32-/64-bit Operating system DSP/BIOS Ethernet MAC 10/100/1000 Rating Catalog Operating temperature range (C) 0 to 100, 0 to 95
DSP 1 C64x DSP MHz (Max) 850, 1000, 1200 CPU 32-/64-bit Operating system DSP/BIOS Ethernet MAC 10/100/1000 Rating Catalog Operating temperature range (C) 0 to 100, 0 to 95
  • High-Performance Fixed-Point DSP (C6457)
    • 1.18-ns, 1-ns, and 0.83-ns Instruction Cycle Time/li>
    • 850-MHz, 1-GHz, and 1.2-GHz Clock Rate
    • Eight 32-Bit Instructions/Cycle
    • 8000 and 9600 MIPS/MMACS (16-Bits)
    • Case Temperature
      • Commercial:
        • 0°C to 100°C (850 MHz)
        • 0°C to 100°C (1 GHz)
        • 0°C to 95°C (1.2 GHz)
      • Extended:
        • -40°C to 100°C (1 GHz)
        • -40°C to 95°C (1.2 GHz)
  • TMS320C64x+™ DSP Core
    • Dedicated SPLOOP Instruction
    • Compact Instructions (16-Bit)
    • Instruction Set Enhancements
    • Exception Handling
  • TMS320C64x+ Megamodule L1/L2 Memory Architecture:
    • 256K-Bit (32K-Byte) L1P Program Cache [Direct Mapped]
    • 256K-Bit (32K-Byte) L1D Data Cache [2-Way Set-Associative]
    • 16M-Bit (2048K-Byte) L2 Unified Mapped Ram/Cache [Flexible Allocation]
      • Configurable up to 1MB of L2 Cache
    • 512K-Bit (64K-Byte) L3 ROM
    • Time Stamp Counter
  • Enhanced VCP2
    • Supports Over 694 7.95-Kbps AMR
    • Programmable Code Parameters
  • Two Enhanced Turbo Decoder Coprocessors (TCP2_A and TCP2_B)
    • Each TCP2 Supports up to Eight 2-Mbps 3GPP (6 Iterations)
    • Programmable Turbo Code and Decoding Parameters
  • Endianess: Little Endian, Big Endian
  • 64-Bit External Memory Interface (EMIFA)
    • Glueless Interface to Asynchronous Memories (SRAM, Flash, and EEPROM) and Synchronous Memories (SBSRAM, ZBT SRAM)
    • Supports Interface to Standard Sync Devices and Custom Logic (FPGA, CPLD, ASICs, etc.)
    • 32M-Byte Total Addressable External Memory Space
  • 32-Bit DDR2 Memory Controller (DDR2-667 SDRAM)
  • Four 1× Serial RapidIO® Links (or One 4×), v1.3 Compliant
    • 1.25-, 2.5-, 3.125-Gbps Link Rates
    • Message Passing, DirectIO Support, Error Mgmt Extensions, Congestion Control
    • IEEE 1149.6 Compliant I/Os
  • EDMA3 Controller (64 Independent Channels)
  • 32-/16-Bit Host-Port Interface (HPI)
  • Two 1.8-V McBSPs
  • 10/100/1000 Mb/s Ethernet MAC (EMAC)
    • IEEE 802.3 Compliant
    • Supports SGMII, v1.8 Compliant
    • 8 Independent Transmit (TX) and 8 Independent Receive (RX) Channels
  • Two 64-Bit General-Purpose Timers
    • Configurable as Four 32-Bit Timers
    • Configurable in a Watchdog Timer Mode
  • UTOPIA
    • UTOPIA Level 2 Slave ATM Controller
    • 8-Bit Transmit and Receive Operations up to 50 MHz per Direction
    • User-Defined Cell Format up to 64 Bytes
  • One 1.8-V Inter-Integrated Circuit (I2C) Bus
  • 16 General-Purpose I/O (GPIO) Pins
  • System PLL and PLL Controller
  • DDR PLL, Dedicated to DDR2 Memory Controller
  • Advanced Event Triggering (AET) Compatible
  • Trace-Enabled Device
  • Supports IP Security
  • IEEE-1149.1 and IEEE-1149.6 (JTAG™) Boundary-Scan-Compatible
  • 688-Pin Ball Grid Array (BGA) Package (CMH or GMH Suffix), 0.8-mm Ball Pitch
  • 0.065-µm/7-Level Cu Metal Process (CMOS)
  • 3.3-V, 1.8-V, 1.1-V I/Os, 1.1-V and 1.2-V Internal

All trademarks are the property of their respective owners.

  • High-Performance Fixed-Point DSP (C6457)
    • 1.18-ns, 1-ns, and 0.83-ns Instruction Cycle Time/li>
    • 850-MHz, 1-GHz, and 1.2-GHz Clock Rate
    • Eight 32-Bit Instructions/Cycle
    • 8000 and 9600 MIPS/MMACS (16-Bits)
    • Case Temperature
      • Commercial:
        • 0°C to 100°C (850 MHz)
        • 0°C to 100°C (1 GHz)
        • 0°C to 95°C (1.2 GHz)
      • Extended:
        • -40°C to 100°C (1 GHz)
        • -40°C to 95°C (1.2 GHz)
  • TMS320C64x+™ DSP Core
    • Dedicated SPLOOP Instruction
    • Compact Instructions (16-Bit)
    • Instruction Set Enhancements
    • Exception Handling
  • TMS320C64x+ Megamodule L1/L2 Memory Architecture:
    • 256K-Bit (32K-Byte) L1P Program Cache [Direct Mapped]
    • 256K-Bit (32K-Byte) L1D Data Cache [2-Way Set-Associative]
    • 16M-Bit (2048K-Byte) L2 Unified Mapped Ram/Cache [Flexible Allocation]
      • Configurable up to 1MB of L2 Cache
    • 512K-Bit (64K-Byte) L3 ROM
    • Time Stamp Counter
  • Enhanced VCP2
    • Supports Over 694 7.95-Kbps AMR
    • Programmable Code Parameters
  • Two Enhanced Turbo Decoder Coprocessors (TCP2_A and TCP2_B)
    • Each TCP2 Supports up to Eight 2-Mbps 3GPP (6 Iterations)
    • Programmable Turbo Code and Decoding Parameters
  • Endianess: Little Endian, Big Endian
  • 64-Bit External Memory Interface (EMIFA)
    • Glueless Interface to Asynchronous Memories (SRAM, Flash, and EEPROM) and Synchronous Memories (SBSRAM, ZBT SRAM)
    • Supports Interface to Standard Sync Devices and Custom Logic (FPGA, CPLD, ASICs, etc.)
    • 32M-Byte Total Addressable External Memory Space
  • 32-Bit DDR2 Memory Controller (DDR2-667 SDRAM)
  • Four 1× Serial RapidIO® Links (or One 4×), v1.3 Compliant
    • 1.25-, 2.5-, 3.125-Gbps Link Rates
    • Message Passing, DirectIO Support, Error Mgmt Extensions, Congestion Control
    • IEEE 1149.6 Compliant I/Os
  • EDMA3 Controller (64 Independent Channels)
  • 32-/16-Bit Host-Port Interface (HPI)
  • Two 1.8-V McBSPs
  • 10/100/1000 Mb/s Ethernet MAC (EMAC)
    • IEEE 802.3 Compliant
    • Supports SGMII, v1.8 Compliant
    • 8 Independent Transmit (TX) and 8 Independent Receive (RX) Channels
  • Two 64-Bit General-Purpose Timers
    • Configurable as Four 32-Bit Timers
    • Configurable in a Watchdog Timer Mode
  • UTOPIA
    • UTOPIA Level 2 Slave ATM Controller
    • 8-Bit Transmit and Receive Operations up to 50 MHz per Direction
    • User-Defined Cell Format up to 64 Bytes
  • One 1.8-V Inter-Integrated Circuit (I2C) Bus
  • 16 General-Purpose I/O (GPIO) Pins
  • System PLL and PLL Controller
  • DDR PLL, Dedicated to DDR2 Memory Controller
  • Advanced Event Triggering (AET) Compatible
  • Trace-Enabled Device
  • Supports IP Security
  • IEEE-1149.1 and IEEE-1149.6 (JTAG™) Boundary-Scan-Compatible
  • 688-Pin Ball Grid Array (BGA) Package (CMH or GMH Suffix), 0.8-mm Ball Pitch
  • 0.065-µm/7-Level Cu Metal Process (CMOS)
  • 3.3-V, 1.8-V, 1.1-V I/Os, 1.1-V and 1.2-V Internal

All trademarks are the property of their respective owners.

The TMS320C64x+™ DSPs (including the TMS320C6457 device) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The C6457 device is based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for applications including video and telecom infrastructure, imaging/medical, and wireless infrastructure (WI). The C64x+ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform.

Based on 65-nm process technology and with performance of up to 9600 million instructions per second (MIPS) [or 9600 16-bit MMACs per cycle] at a 1.2-GHz clock rate, the C6457 device offers cost-effective solutions to high-performance DSP programming challenges. The C6457 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors.

The C64x+ DSP core employs eight functional units, two register files, and two data paths. Like the earlier C6000 devices, two of these eight functional units are multipliers or .M units. Each C64x+ .M unit doubles the multiply throughput versus the C64x core by performing four 16-bit × 16-bit multiply-accumulates (MACs) every clock cycle. Thus, eight 16-bit × 16-bit MACs can be executed every cycle on the C64x+ core. At a 1.2-GHz clock rate, this means 9600 16-bit MMACs can occur every second. Moreover, each multiplier on the C64x+ core can compute one 32-bit × 32-bit MAC or four 8-bit × 8-bit MACs every clock cycle.

The C6457 device includes Serial RapidIO®. This high-bandwidth peripheral dramatically improves system performance and reduces system cost for applications that include multiple DSPs on a board, such as video and telecom infrastructures and medical/imaging.

The C6457 DSP integrates a large amount of on-chip memory organized as a two-level memory system. The level-1 (L1) program and data memories on the C6457 device are 32KB each. This memory can be configured as mapped RAM, cache, or some combination of the two. When configured as cache, L1 program (L1P) is a direct mapped cache whereas L1 data (L1D) is a two-way set associative cache. The level 2 (L2) memory is shared between program and data space and is 2048KB in size. L2 memory can also be configured as mapped RAM, cache, or some combination of the two. L2 is configurable up to 1MB of cache. The C64x+ Megamodule also has a 32-bit peripheral configuration (CFG) port, an internal DMA (IDMA) controller, a system component with reset/boot control, interrupt/exception control, a power-down control, and a free-running 32-bit timer for time stamp.

The peripheral set includes: an inter-integrated circuit bus module (I2C); two multichannel buffered serial ports (McBSPs); an 8-bit Universal Test and Operations PHY Interface for Asynchronous Transfer Mode (ATM) Slave [UTOPIA Slave] port; two 64-bit general-purpose timers (also configurable as four 32-bit timers); a user-configurable 16-bit or 32-bit host-port interface (HPI16/HPI32); a 16-pin general-purpose input/output port (GPIO) with programmable interrupt/event generation modes; an 10/100/1000 Ethernet media access controller (EMAC), which provides an efficient interface between the C6457 DSP core processor and the network; a management data input/output (MDIO) module (also part of the EMAC) that continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system; a glueless external memory interface (64-bit EMIFA), which is capable of interfacing to synchronous and asynchronous peripherals; and a 32-bit DDR2 SDRAM interface.

The C6457 device has three high-performance embedded coprocessors [one enhanced Viterbi Decoder Coprocessor (VCP2) and two enhanced Turbo Decoder Coprocessors (TCP2_A and TCP2_B)] that significantly speed up channel-decoding operations on-chip. The VCP2 operating at CPU clock ÷ 3 can decode more than 694 7.95-Kbps adaptive multi-rate (AMR) [K = 9, R = 1/3] voice channels. The VCP2 supports constraint lengths K = 5, 6, 7, 8, and 9, rates R = 3/4, 1/2, 1/3, 1/4, and 1/5, and flexible polynomials, while generating hard decisions or soft decisions. Each TCP2 operating at CPU clock ÷ 3 can decode up to fifty 384-Kbps or eight 2-Mbps turbo encoded channels (assuming 6 iterations). The TCP2 implements the max*log-map algorithm and is designed to support all polynomials and rates required by Third-Generation Partnership Projects (3GPP and 3GPP2), with fully programmable frame length and turbo interleaver. Decoding parameters such as the number of iterations and stopping criteria are also programmable. Communications between the VCP2/TCP2s and the CPU are carried out through the EDMA3 controller.

The C6457 device has a complete set of development tools, which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows® debugger interface for visibility into source code execution.

The TMS320C64x+™ DSPs (including the TMS320C6457 device) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The C6457 device is based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for applications including video and telecom infrastructure, imaging/medical, and wireless infrastructure (WI). The C64x+ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform.

Based on 65-nm process technology and with performance of up to 9600 million instructions per second (MIPS) [or 9600 16-bit MMACs per cycle] at a 1.2-GHz clock rate, the C6457 device offers cost-effective solutions to high-performance DSP programming challenges. The C6457 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors.

The C64x+ DSP core employs eight functional units, two register files, and two data paths. Like the earlier C6000 devices, two of these eight functional units are multipliers or .M units. Each C64x+ .M unit doubles the multiply throughput versus the C64x core by performing four 16-bit × 16-bit multiply-accumulates (MACs) every clock cycle. Thus, eight 16-bit × 16-bit MACs can be executed every cycle on the C64x+ core. At a 1.2-GHz clock rate, this means 9600 16-bit MMACs can occur every second. Moreover, each multiplier on the C64x+ core can compute one 32-bit × 32-bit MAC or four 8-bit × 8-bit MACs every clock cycle.

The C6457 device includes Serial RapidIO®. This high-bandwidth peripheral dramatically improves system performance and reduces system cost for applications that include multiple DSPs on a board, such as video and telecom infrastructures and medical/imaging.

The C6457 DSP integrates a large amount of on-chip memory organized as a two-level memory system. The level-1 (L1) program and data memories on the C6457 device are 32KB each. This memory can be configured as mapped RAM, cache, or some combination of the two. When configured as cache, L1 program (L1P) is a direct mapped cache whereas L1 data (L1D) is a two-way set associative cache. The level 2 (L2) memory is shared between program and data space and is 2048KB in size. L2 memory can also be configured as mapped RAM, cache, or some combination of the two. L2 is configurable up to 1MB of cache. The C64x+ Megamodule also has a 32-bit peripheral configuration (CFG) port, an internal DMA (IDMA) controller, a system component with reset/boot control, interrupt/exception control, a power-down control, and a free-running 32-bit timer for time stamp.

The peripheral set includes: an inter-integrated circuit bus module (I2C); two multichannel buffered serial ports (McBSPs); an 8-bit Universal Test and Operations PHY Interface for Asynchronous Transfer Mode (ATM) Slave [UTOPIA Slave] port; two 64-bit general-purpose timers (also configurable as four 32-bit timers); a user-configurable 16-bit or 32-bit host-port interface (HPI16/HPI32); a 16-pin general-purpose input/output port (GPIO) with programmable interrupt/event generation modes; an 10/100/1000 Ethernet media access controller (EMAC), which provides an efficient interface between the C6457 DSP core processor and the network; a management data input/output (MDIO) module (also part of the EMAC) that continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system; a glueless external memory interface (64-bit EMIFA), which is capable of interfacing to synchronous and asynchronous peripherals; and a 32-bit DDR2 SDRAM interface.

The C6457 device has three high-performance embedded coprocessors [one enhanced Viterbi Decoder Coprocessor (VCP2) and two enhanced Turbo Decoder Coprocessors (TCP2_A and TCP2_B)] that significantly speed up channel-decoding operations on-chip. The VCP2 operating at CPU clock ÷ 3 can decode more than 694 7.95-Kbps adaptive multi-rate (AMR) [K = 9, R = 1/3] voice channels. The VCP2 supports constraint lengths K = 5, 6, 7, 8, and 9, rates R = 3/4, 1/2, 1/3, 1/4, and 1/5, and flexible polynomials, while generating hard decisions or soft decisions. Each TCP2 operating at CPU clock ÷ 3 can decode up to fifty 384-Kbps or eight 2-Mbps turbo encoded channels (assuming 6 iterations). The TCP2 implements the max*log-map algorithm and is designed to support all polynomials and rates required by Third-Generation Partnership Projects (3GPP and 3GPP2), with fully programmable frame length and turbo interleaver. Decoding parameters such as the number of iterations and stopping criteria are also programmable. Communications between the VCP2/TCP2s and the CPU are carried out through the EDMA3 controller.

The C6457 device has a complete set of development tools, which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows® debugger interface for visibility into source code execution.

Download

No design support from TI available

This product does not have ongoing design support from TI for new projects, such as new content or software updates. If available, you will find relevant collateral, software and tools in the product folder. You can also search for archived information in the TI E2ETM support forums.

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 36
Type Title Date
* Data sheet TMS320C6457 Communications Infrastructure Digital Signal Processor datasheet (Rev. B) 09 Jul 2010
* Errata TMS320C6457 DSP Silicon Errata (Silicon Revisions 1.0, 1.1, 1.2, 1.3 and 1.4) (Rev. A) 22 Jan 2010
Application note How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A) PDF | HTML 19 May 2021
User guide SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) 01 Jun 2020
Application note Using DSPLIB FFT Implementation for Real Input and Without Data Scaling PDF | HTML 11 Jun 2019
Application note TMS320TCI6484 and TMS320C6457 SERDES Implementation Guidelines (Rev. B) 30 Apr 2019
Technical article Difficult to see. Always in motion is the future 04 Jan 2016
Technical article Announcing the new entry-level Sitara processor 09 Dec 2015
Technical article Automotive Surround View Technology trends 31 Aug 2015
Technical article Solar Inverter Gateways Made Simple with AM335x 28 Jul 2015
Application note Error Detection and Correction Mechanism of TMS320C64x+/C674x (Rev. A) 19 Jul 2013
User guide TMS320C6457 DSP EMAC / MDIO User's Guide (Rev. A) 02 May 2012
Application note Introduction to TMS320C6000 DSP Optimization 06 Oct 2011
User guide TMS320C6457 DSP DDR2 Memory Controller User's Guide (Rev. D) 22 Jun 2011
User guide Bootloader User's Guide for the TMS320C645x/C647x DSP (Rev. G) 03 Jun 2011
Application note TMS320C6457 Power Consumption Application Report (Rev. A) 25 Mar 2011
Application note Tuning VCP2 and TCP2 Bit Error Rate Performance 11 Feb 2011
User guide TMS320C6457 DSP Serial RapidIO (SRIO) User's Guide (Rev. D) 03 Feb 2011
User guide TMS320C64x+ DSP Megamodule Reference Guide (Rev. K) 03 Aug 2010
User guide TMS320C6457 DSP External Memory Interface (EMIF) User's Guide (Rev. B) 30 Jul 2010
User guide TMS320C6457 DSP Host Port Interface (HPI) User's Guide (Rev. A) 30 Jul 2010
User guide TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (Rev. J) 30 Jul 2010
User guide TMS320C6457 DSP Multichannel Buffered Serial Port (McBSP) User's Guide (Rev. A) 18 May 2010
Application note TMS320C6457/TMS320TCI6484/TMS320TCI6487/88 DDR2 Implementation Guidelines (Rev. D) 28 Jan 2010
User guide TMS320C6457 DSP Viterbi-Decoder Coprocessor 2 Reference (VCP2) Guide (Rev. A) 08 Dec 2009
User guide TMS320C6457 DSP Inter-Integrated Circuit (I2C) Module User's Guide (Rev. A) 28 Oct 2009
Application note TMS320TCI6484 and TMS320C6457 DSPs Hardware Design Guide (Rev. B) 08 Oct 2009
User guide TMS320C6457 DSP 64-Bit Timer User's Guide 11 Mar 2009
User guide TMS320C6457 DSP Enhanced (EDMA3) Controller User's Guide 11 Mar 2009
User guide TMS320C6457 DSP General-Purpose Input/Output (GPIO) User's Guide 11 Mar 2009
User guide TMS320C6457 DSP Power/Sleep Controller (PSC) User's Guide 11 Mar 2009
User guide TMS320C6457 DSP Turbo-Decoder Coprocessor 2 Reference Guide 11 Mar 2009
User guide TMS320C6457 DSP Universal Test & Operations PHY Interface for ATM 2 (UTOPIA2) UG 11 Mar 2009
User guide TMS320C6457 DSP Software-Programmable Phase-Locked Loop (PLL) Controller UG 11 Mar 2008
Application note Migrating from TMS320C64x to TMS320C64x+ (Rev. A) 20 Oct 2005
User guide High-Speed DSP Systems Design Reference Guide 20 May 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

EINFO-3P-SOM-EVM — eInfochips System on Modules and EVMs

eInfochips is a product engineering and design services company with over 20 years of experience, 500+ product developments, and over 40M deployments in 140 countries, across the world. The company has delivered turnkey technology solutions for many Fortune 500 companies, across multiple verticals. (...)

From: eInfochips
Debug probe

TMDSEMU200-U — XDS200 USB Debug Probe

The XDS200 is a debug probe (emulator) used for debugging TI embedded devices.  The XDS200 features a balance of low cost with good performance as compared to the low cost XDS110 and the high performance XDS560v2.  It supports a wide variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a (...)

Not available on TI.com
Debug probe

TMDSEMU560V2STM-U — XDS560v2 System Trace USB Debug Probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Not available on TI.com
Debug probe

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB & Ethernet Debug Probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Not available on TI.com
Software development kit (SDK)

BIOSMCSDK-C64XPLUS SYS/BIOS MCSDK for C647x and C645x

NOTE: K2x, C665x and C667x devices are now actively maintained on the Processor-SDK release stream. See links above.

Our Multicore Software Development Kits (MCSDK) provide highly-optimized bundles of foundational, platform-specific drivers to enable development on selected TI ARM and DSP devices. (...)

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320C6457 Communications infrastructure digital signal processor
Download options
Software development kit (SDK)

BIOSMCSDK-C66X SYS/BIOS MCSDK for C66x

NOTE: K2x, C665x and C667x devices are now actively maintained on the Processor-SDK release stream. See links above.

Our Multicore Software Development Kits (MCSDK) provide highly-optimized bundles of foundational, platform-specific drivers to enable development on selected TI ARM and DSP devices. (...)

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320C6457 Communications infrastructure digital signal processor TMS320C6657 High performance dual-core C66x fixed and floating-point DSP- up to 1.25GHz, 2 UART TMS320C6670 4 core fixed and floating point DSP for Communications and Telecom TMS320C6678 High performance octo-core C66x fixed and floating-point DSP- up to 1.25GHz
Hardware development
Download options
Software development kit (SDK)

LINUXMCSDK Linux MCSDK for C66x, C647x and C645x

NOTE: K2x, C665x and C667x devices are now actively maintained on the Processor-SDK release stream. See links above.

Our Multicore Software Development Kits (MCSDK) provide highly-optimized bundles of foundational, platform-specific drivers to enable development on selected TI ARM and DSP devices. (...)

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320C6455 C64x+ fixed point DSP- up to 1.2GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6457 Communications infrastructure digital signal processor TMS320C6472 Fixed-Point Digital Signal Processor TMS320C6474 Multicore Digital Signal Processor TMS320C6670 4 core fixed and floating point DSP for Communications and Telecom TMS320C6678 High performance octo-core C66x fixed and floating-point DSP- up to 1.25GHz
Hardware development
TMDSDSK6455 TMS320C6455 DSP Starter Kit (DSK)
Download options
Software development kit (SDK)

MEDIMGSTK-C66X TI Embedded Processor Software Tool Kit for Medical Imaging (STK-MED) - for C66x and C64x+ based processors

The TI Embedded Processor Software Toolkit for Medical Imaging (STK-MED) is a collection of several standard ultrasound and optical coherence tomography (OCT) algorithms for TI’s C66x™ and C64x+™ architecture. The algorithms showcase how medical imaging functions can leverage the C66x and (...)
Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
DM505 SoC for vision analytics 15mm package SM320C6678-HIREL High reliability product high performance 8-core C6678 fixed and floating-point DSP TMS320C6454 C64x+ fixed point DSP- up to 1GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6455 C64x+ fixed point DSP- up to 1.2GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6457 Communications infrastructure digital signal processor TMS320C6472 Fixed-Point Digital Signal Processor TMS320C6474 Multicore Digital Signal Processor
Download options
Driver or library

AEC-AER Acoustic echo cancellation/removal for TI C64x+, C674x, C55x and Cortex®-A8 processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Supported products & hardware

Supported products & hardware

Products
Arm-based processors
66AK2G12 High performance multicore DSP+Arm - 1x Arm A15 cores, 1x C66x DSP core
Digital signal processors (DSPs)
DM505 SoC for vision analytics 15mm package SM320C6201-EP Enhanced product C6201 fixed point DSP SM320C6415 Military grade C64x fixed point DSP SM320C6415-EP Enhanced product C6415 fixed point DSP SM320C6424-EP Enhanced product C6424 fixed point DSP SM320C6455-EP Enhanced product C6455 fixed point DSP SM320C6472-HIREL High reliability product 6 Core C6472 fixed point DSP SM320C6678-HIREL High reliability product high performance 8-core C6678 fixed and floating-point DSP SM320C6701 Single core C67x floating-point DSP for military applications - up to 167MHz SM320C6701-EP Enhanced product C6701 floating-point DSP SM320C6711D-EP Enhanced product C6711D floating-point DSP SM320C6712D-EP Enhanced product C6712D DSP SM320C6713B-EP Enhanced product C6713 floating-point DSP SM320C6727B Military grade C6727B floating-point DSP SM320C6727B-EP Enhanced product C6727 floating-point DSP SM320DM642-HIREL High reliability product digital media DM642 DSP SM32C6416T-EP Enhanced product C6416T fixed point DSP SMJ320C6201B Fixed Point Digital Signal Processor, Military SMJ320C6203 Military grade C62x fixed point DSP - ceramic package SMJ320C6415 Military grade C64x fixed point DSP - ceramic package SMJ320C6701 Military grade C67x floating-point DSP - ceramic package SMJ320C6701-SP Space grade C6701 floating-point DSP - rad-tolerant class V with ceramic package SMV320C6727B-SP Space grade C6727B floating-point DSP - rad-tolerant class V with ceramic package TMS320C5517 Low power C55x fixed point DSP- up to 200MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C5532 Low power C55x fixed point DSP- up to 100MHz TMS320C5533 Low power C55x fixed point DSP- up to 100MHz, USB TMS320C5534 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface TMS320C5535 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C6201 Fixed-Point Digital Signal Processor TMS320C6202 Fixed-Point Digital Signal Processor TMS320C6202B C62x fixed point DSP- up to 300MHz, 384KB TMS320C6203B C62x fixed point DSP- up to 300MHz, 896KB TMS320C6204 Fixed-Point Digital Signal Processor TMS320C6205 Fixed-Point Digital Signal Processor TMS320C6211B C62x fixed point DSP- up to 167MHz TMS320C6411 C64x fixed point DSP- up to 300MHz, McBSP TMS320C6414 C64x fixed point DSP- up to 720MHz, McBSP TMS320C6415 C64x fixed point DSP- up to 720MHz, McBSP, PCI TMS320C6416 C64x fixed point DSP- up to 720MHz, McBSP, PCI, VCP/TCP TMS320C6421Q C64x+ fixed point DSP- up to 600MHz, 8 Bit EMIFA, 16-Bit DDR2 TMS320C6424Q C64x+ fixed point DSP- up to 600MHz, 16/8-Bit EMIFA, 32/16 Bit DDR2 TMS320C6454 C64x+ fixed point DSP- up to 1GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6457 Communications infrastructure digital signal processor TMS320C6701 C67x floating-point DSP- up to 167MHz, McBSP TMS320C6711D C67x floating-point DSP- up to 250MHz, McBSP, 32-Bit EMIFA TMS320C6712D C67x floating-point DSP- up to 150MHz, McBSP, 16-Bit EMIFA TMS320C6720 C67x floating-point DSP - 200MHz, McASP, 16-Bit EMIFA TMS320C6722B C67x floating-point DSP- up to 250MHz, McASP, 16-Bit EMIFA TMS320C6726B C67x floating-point DSP- up to 266MHz, McASP, 16-Bit EMIFA TMS320C6727 C67x floating-point DSP- up to 250MHz, McASP, 32-Bit EMIFA TMS320C6727B C67x floating-point DSP- up to 350MHz, McASP, 32-Bit EMIFA TMS320C6743 Low power C674x floating-point DSP- 375MHz TMS320C6745 Low power C674x floating-point DSP- 456MHz, QFP TMS320C6747 Low power C674x floating-point DSP- 456MHz, PBGA TMS320DM642Q Video/imaging fixed-point digital signal processor TMS320DM6431Q Digital media processor, up to 2400 MIPS, 300 MHz clock rate TMS320DM6435Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 1 McBSP TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip TMS320DM647 Digital Media Processor
Download options
Driver or library

FAXLIB FAX library (FAXLIB) for C66x, C64x+ and C55x processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Supported products & hardware

Supported products & hardware

Products
Arm-based processors
66AK2G12 High performance multicore DSP+Arm - 1x Arm A15 cores, 1x C66x DSP core
Digital signal processors (DSPs)
DM505 SoC for vision analytics 15mm package SM320C6201-EP Enhanced product C6201 fixed point DSP SM320C6415 Military grade C64x fixed point DSP SM320C6415-EP Enhanced product C6415 fixed point DSP SM320C6424-EP Enhanced product C6424 fixed point DSP SM320C6455-EP Enhanced product C6455 fixed point DSP SM320C6472-HIREL High reliability product 6 Core C6472 fixed point DSP SM320C6678-HIREL High reliability product high performance 8-core C6678 fixed and floating-point DSP SM320C6701 Single core C67x floating-point DSP for military applications - up to 167MHz SM320C6701-EP Enhanced product C6701 floating-point DSP SM320C6711D-EP Enhanced product C6711D floating-point DSP SM320C6712D-EP Enhanced product C6712D DSP SM320C6713B-EP Enhanced product C6713 floating-point DSP SM320C6727B Military grade C6727B floating-point DSP SM320C6727B-EP Enhanced product C6727 floating-point DSP SM320DM642-HIREL High reliability product digital media DM642 DSP SM32C6416T-EP Enhanced product C6416T fixed point DSP SMJ320C6201B Fixed Point Digital Signal Processor, Military SMJ320C6203 Military grade C62x fixed point DSP - ceramic package SMJ320C6415 Military grade C64x fixed point DSP - ceramic package SMJ320C6701 Military grade C67x floating-point DSP - ceramic package SMJ320C6701-SP Space grade C6701 floating-point DSP - rad-tolerant class V with ceramic package SMV320C6727B-SP Space grade C6727B floating-point DSP - rad-tolerant class V with ceramic package TMS320C5517 Low power C55x fixed point DSP- up to 200MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C5532 Low power C55x fixed point DSP- up to 100MHz TMS320C5533 Low power C55x fixed point DSP- up to 100MHz, USB TMS320C5534 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface TMS320C5535 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C6201 Fixed-Point Digital Signal Processor TMS320C6202 Fixed-Point Digital Signal Processor TMS320C6202B C62x fixed point DSP- up to 300MHz, 384KB TMS320C6203B C62x fixed point DSP- up to 300MHz, 896KB TMS320C6204 Fixed-Point Digital Signal Processor TMS320C6205 Fixed-Point Digital Signal Processor TMS320C6211B C62x fixed point DSP- up to 167MHz TMS320C6411 C64x fixed point DSP- up to 300MHz, McBSP TMS320C6414 C64x fixed point DSP- up to 720MHz, McBSP TMS320C6415 C64x fixed point DSP- up to 720MHz, McBSP, PCI TMS320C6416 C64x fixed point DSP- up to 720MHz, McBSP, PCI, VCP/TCP TMS320C6421Q C64x+ fixed point DSP- up to 600MHz, 8 Bit EMIFA, 16-Bit DDR2 TMS320C6424Q C64x+ fixed point DSP- up to 600MHz, 16/8-Bit EMIFA, 32/16 Bit DDR2 TMS320C6454 C64x+ fixed point DSP- up to 1GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6457 Communications infrastructure digital signal processor TMS320C6701 C67x floating-point DSP- up to 167MHz, McBSP TMS320C6711D C67x floating-point DSP- up to 250MHz, McBSP, 32-Bit EMIFA TMS320C6712D C67x floating-point DSP- up to 150MHz, McBSP, 16-Bit EMIFA TMS320C6720 C67x floating-point DSP - 200MHz, McASP, 16-Bit EMIFA TMS320C6722B C67x floating-point DSP- up to 250MHz, McASP, 16-Bit EMIFA TMS320C6726B C67x floating-point DSP- up to 266MHz, McASP, 16-Bit EMIFA TMS320C6727 C67x floating-point DSP- up to 250MHz, McASP, 32-Bit EMIFA TMS320C6727B C67x floating-point DSP- up to 350MHz, McASP, 32-Bit EMIFA TMS320C6743 Low power C674x floating-point DSP- 375MHz TMS320C6745 Low power C674x floating-point DSP- 456MHz, QFP TMS320C6747 Low power C674x floating-point DSP- 456MHz, PBGA TMS320DM642Q Video/imaging fixed-point digital signal processor TMS320DM6431Q Digital media processor, up to 2400 MIPS, 300 MHz clock rate TMS320DM6435Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 1 McBSP TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip TMS320DM647 Digital Media Processor
Download options
Driver or library

SPRC122 — C62x/C64x Fast Run-Time Support (RTS) Library

The C62x/64x FastRTS Library is an optimized, floating-point function library for C programmers using either TMS320C62x or TMS320C64x devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By replacing the current (...)
Driver or library

SPRC264 — TMS320C5000/6000 Image Library (IMGLIB)

C5000/6000 Image Processing Library (IMGLIB) is an optimized image/video processing function library for C programmers. It includes C-callable general-purpose image/video processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Driver or library

SPRC265 — TMS320C6000 DSP Library (DSPLIB)

TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Driver or library

SPRC542 — C64x+ IQMath Library - A Virtual Floating Point Engine

Texas Instruments TMS320C64x+ IQmath Library is collection of highly optimized and high precision mathematical Function Library for C/C++ programmers to seamlessly port the floating-point algorithm into fixed point code on TMS320C64x+ devices. These routines are typically used in computationally (...)
Driver or library

SPRC924 — Chip Support Library for C6457

This release of CSL for TMS320C6457 contains peripheral programming (functional and register level) APIs for C6457 modules. This set of APIs provides peripheral abstraction that can be used by higher layers of software.
Driver or library

VOLIB Voice library (VoLIB) for C66x, C64x+ and C55x processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Supported products & hardware

Supported products & hardware

Products
Arm-based processors
66AK2G12 High performance multicore DSP+Arm - 1x Arm A15 cores, 1x C66x DSP core
Digital signal processors (DSPs)
DM505 SoC for vision analytics 15mm package SM320C6201-EP Enhanced product C6201 fixed point DSP SM320C6415 Military grade C64x fixed point DSP SM320C6415-EP Enhanced product C6415 fixed point DSP SM320C6424-EP Enhanced product C6424 fixed point DSP SM320C6455-EP Enhanced product C6455 fixed point DSP SM320C6472-HIREL High reliability product 6 Core C6472 fixed point DSP SM320C6678-HIREL High reliability product high performance 8-core C6678 fixed and floating-point DSP SM320C6701 Single core C67x floating-point DSP for military applications - up to 167MHz SM320C6701-EP Enhanced product C6701 floating-point DSP SM320C6711D-EP Enhanced product C6711D floating-point DSP SM320C6712D-EP Enhanced product C6712D DSP SM320C6713B-EP Enhanced product C6713 floating-point DSP SM320C6727B Military grade C6727B floating-point DSP SM320C6727B-EP Enhanced product C6727 floating-point DSP SM320DM642-HIREL High reliability product digital media DM642 DSP SM32C6416T-EP Enhanced product C6416T fixed point DSP SMJ320C6201B Fixed Point Digital Signal Processor, Military SMJ320C6203 Military grade C62x fixed point DSP - ceramic package SMJ320C6415 Military grade C64x fixed point DSP - ceramic package SMJ320C6701 Military grade C67x floating-point DSP - ceramic package SMJ320C6701-SP Space grade C6701 floating-point DSP - rad-tolerant class V with ceramic package SMV320C6727B-SP Space grade C6727B floating-point DSP - rad-tolerant class V with ceramic package TMS320C5517 Low power C55x fixed point DSP- up to 200MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C5532 Low power C55x fixed point DSP- up to 100MHz TMS320C5533 Low power C55x fixed point DSP- up to 100MHz, USB TMS320C5534 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface TMS320C5535 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C6201 Fixed-Point Digital Signal Processor TMS320C6202 Fixed-Point Digital Signal Processor TMS320C6202B C62x fixed point DSP- up to 300MHz, 384KB TMS320C6203B C62x fixed point DSP- up to 300MHz, 896KB TMS320C6204 Fixed-Point Digital Signal Processor TMS320C6205 Fixed-Point Digital Signal Processor TMS320C6211B C62x fixed point DSP- up to 167MHz TMS320C6411 C64x fixed point DSP- up to 300MHz, McBSP TMS320C6414 C64x fixed point DSP- up to 720MHz, McBSP TMS320C6415 C64x fixed point DSP- up to 720MHz, McBSP, PCI TMS320C6416 C64x fixed point DSP- up to 720MHz, McBSP, PCI, VCP/TCP TMS320C6421Q C64x+ fixed point DSP- up to 600MHz, 8 Bit EMIFA, 16-Bit DDR2 TMS320C6424Q C64x+ fixed point DSP- up to 600MHz, 16/8-Bit EMIFA, 32/16 Bit DDR2 TMS320C6454 C64x+ fixed point DSP- up to 1GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6457 Communications infrastructure digital signal processor TMS320C6701 C67x floating-point DSP- up to 167MHz, McBSP TMS320C6711D C67x floating-point DSP- up to 250MHz, McBSP, 32-Bit EMIFA TMS320C6712D C67x floating-point DSP- up to 150MHz, McBSP, 16-Bit EMIFA TMS320C6720 C67x floating-point DSP - 200MHz, McASP, 16-Bit EMIFA TMS320C6722B C67x floating-point DSP- up to 250MHz, McASP, 16-Bit EMIFA TMS320C6726B C67x floating-point DSP- up to 266MHz, McASP, 16-Bit EMIFA TMS320C6727 C67x floating-point DSP- up to 250MHz, McASP, 32-Bit EMIFA TMS320C6727B C67x floating-point DSP- up to 350MHz, McASP, 32-Bit EMIFA TMS320C6743 Low power C674x floating-point DSP- 375MHz TMS320C6745 Low power C674x floating-point DSP- 456MHz, QFP TMS320C6747 Low power C674x floating-point DSP- 456MHz, PBGA TMS320DM642Q Video/imaging fixed-point digital signal processor TMS320DM6431Q Digital media processor, up to 2400 MIPS, 300 MHz clock rate TMS320DM6435Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 1 McBSP TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip TMS320DM647 Digital Media Processor
Download options
IDE, configuration, compiler or debugger

CCSTUDIO Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It comprises a suite of tools used to develop and debug embedded applications.  Code Composer Studio is available for download across Windows®, Linux® and macOS® (...)

Supported products & hardware

Supported products & hardware

This design resource supports most products in these categories.

Check the product details page to verify support.

Products
Automotive mmWave radar sensors
AWR1243 76-GHz to 81-GHz high-performance automotive MMIC AWR1443 Single-chip 76-GHz to 81-GHz automotive radar sensor integrating MCU and hardware accelerator AWR1642 Single-chip 76-GHz to 81-GHz automotive radar sensor integrating DSP and MCU AWR1843 Single-chip 76-GHz to 81-GHz automotive radar sensor integrating DSP, MCU and radar accelerator AWR1843AOP Single-chip 76-GHz to 81-GHz automotive radar sensor integrating antenna on package, DSP and MCU AWR2243 76-GHz to 81-GHz automotive second-generation high-performance MMIC AWR2944 Automotive 2nd-generation, 76-GHz to 81-GHz, high-performance SoC for corner and long-range radar AWR6443 Single-chip 60-GHz to 64-GHz automotive radar sensor integrating MCU and radar accelerator AWR6843 Single-chip 60-GHz to 64-GHz automotive radar sensor integrating DSP, MCU and radar accelerator AWR6843AOP Single-chip 60-GHz to 64-GHz automotive radar sensor integrating antenna on package, DSP and MCU
Industrial mmWave radar sensors
IWR1443 Single-chip 76-GHz to 81-GHz mmWave sensor integrating MCU and hardware accelerator IWR1642 Single-chip 76-GHz to 81-GHz mmWave sensor integrating DSP and MCU IWR1843 Single-chip 76-GHz to 81-GHz industrial radar sensor integrating DSP, MCU and radar accelerator IWR6443 Single-chip 60-GHz to 64-GHz intelligent mmWave sensor integrating MCU and hardware accelerator IWR6843 Single-chip 60-GHz to 64-GHz intelligent mmWave sensor integrating processing capability IWR6843AOP Single-chip 60-GHz to 64-GHz intelligent mmWave sensor with integrated antenna on package (AoP)
Evaluate in the cloud Download options
Software codec

ADT-3P-DSPVOIPCODECS — Adaptive Digital Technologies DSP VOIP, speech and audio codecs

Adaptive Digital is a developer of voice quality enhancement algorithms, and best-in-class acoustic echo cancellation software that work with TI DSPs. Adaptive Digital has extensive experience in the algorithm development, implementation, optimization and configuration tuning. They provide (...)
Software codec

C64XPLUSCODECSPCH Speech Codecs for C64x+-based Devices

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. Click GET SOFTWARE button (above) to access the most recent, tested codec versions available. Datasheets and Release Notes are on (...)

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320C6457 Communications infrastructure digital signal processor TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip
Download options
Software codec

C64XPLUSCODECSVID C64x+ Video Codecs - Software and Documentation

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. Click GET SOFTWARE button (above) to access the most recent, tested codec versions available. Datasheets and Release Notes are on (...)

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320C6457 Communications infrastructure digital signal processor TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip
Download options
Software codec

COUTH-3P-DSPVOIPCODECS — CouthIT DSP VoIP, speech, and audio codecs

Since 1999, CouthIT has been helping customers transform their ideas into real-time robust software solutions. They license specialized, pre-built, highly optimized software modules in the areas of VoIP and speech and audio codecs, and provide software optimization and customization services for (...)
Software codec

VOCAL-3P-DSPVOIPCODECS — Vocal technologies DSP VoIP codecs

With over 25 years of assembly and C code development, VOCAL modular software suite is available for a wide variety of TI DSPs. Products include ATAs, VoIP servers and gateways, HPNA-based IPBXs, video surveillance, voice and video conferencing, voice and data RF devices, RoIP gateways, secure (...)
Simulation model

C6457 CMH IBIS Model (Rev. A)

SPRM360A.ZIP (524 KB) - IBIS Model
Simulation model

C6457 CMH and GMH BSDL Model

SPRM381.ZIP (17 KB) - BSDL Model
Design tool

PROCESSORS-3P-SEARCH — Arm-based MPU, arm-based MCU and DSP third-party search tool

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
Package Pins Download
(CMH) 688 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos