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AM2431

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Cortex®-R5F-basierte Arm® MCU mit Industriekommunikation und Sicherheit bis zu 800 MHz

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AM2431

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CPU Arm Cortex-R5F Frequency (MHz) 800 Certified protocol software stacks EnDat 2.2 Features EtherCAT, EtherNet/IP, IO-Link, Integrated industrial protocols, Profinet, TSN Operating system FreeRTOS TI functional safety category Functional Safety-Compliant Rating Catalog Power supply solution LP8733, TPS65219 Operating temperature range (°C) -40 to 125 Ethernet Yes
CPU Arm Cortex-R5F Frequency (MHz) 800 Certified protocol software stacks EnDat 2.2 Features EtherCAT, EtherNet/IP, IO-Link, Integrated industrial protocols, Profinet, TSN Operating system FreeRTOS TI functional safety category Functional Safety-Compliant Rating Catalog Power supply solution LP8733, TPS65219 Operating temperature range (°C) -40 to 125 Ethernet Yes
FCBGA (ALV) 441 295.84 mm² 17.2 x 17.2 FCCSP (ALX) 293 121 mm² 11 x 11
  • Up to 2× Dual-core Arm Cortex-R5F MCU subsystems operating at up to 800MHz, highly-integrated for real-time processing
    • Dual-core Arm Cortex-R5F clusters support dual-core and single-core operation
    • 32KB I-cache and 32KB D-cache per R5F core with SECDED ECC on all memories
    • Single-core: 128KB TCM per cluster (128KB TCM per R5F core)
    • Dual-core: 128KB TCM per cluster (64KB TCM per R5F core)
  • 1× Single-core Arm Cortex-M4F MCU at up to 400MHz
    • 256KB SRAM with SECDED ECC
  • Up to 2MB of On-chip RAM (OCSRAM) with SECDED ECC:
    • Can be divided into smaller banks in increments of 256KB for as many as 8 separate memory banks
    • Each memory bank can be allocated to a single core to facilitate software task partitioning
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4, DDR4 memory types
    • 16-bit data bus with inline ECC
    • Supports speeds up to 1600 MT/s
  • Device Management Security Controller (DMSC-L)
    • Centralized SoC system controller
    • Manages system services including initial boot, security, and clock/reset/power management
    • Communication with various processing units over message manager
    • Simplified interface for optimizing unused peripherals
    • On-Chip Debug functionality through JTAG and Trace interfaces)
  • Data Movement Subsystem (DMSS)
    • Block Copy DMA (BCDMA)
    • Packet DMA (PKTDMA)
    • Secure Proxy (SEC_PROXY)
    • Ring Accelerator (RINGACC)
  • Time Sync Subsystem
    • Central Platform Time Sync (CPTS) module
    • Timer Manager (TIMERMANAGER) with 1024 timers
    • Time Sync and Compare event interrupt routers
  • 2× Gigabit Industrial Communication Subsystems (PRU_ICSSG)
    • Optional support for Profinet IRT, Profinet RT, EtherNet/IP, EtherCAT, Time-Sensitive Networking (TSN), and other Networking Protocols
    • Backwards compatibility with 10/100Mb PRU-ICSS
    • Each PRU_ICSSG contains:
      • 3× PRU RISC Cores per Slice (2× Slice per PRU_ICSSG)
        • PRU General Use core (PRU)
        • PRU Real-Time Unit core (PRU-RTU)
        • PRU Transmit core (PRU-TX)
      • Each PRU core supports the following features:
        • Instruction RAM with ECC
        • Broadside RAM
        • Multiplier with optional accumulator (MAC)
        • CRC16/32 hardware accelerator
        • Byte swap for Big/Little Endian conversion
        • SUM32 hardware accelerator for UDP checksum
        • Task Manager for preemption support
      • Up to 2× Ethernet ports
        • RGMII (10/100/1000)
        • MII (10/100)
      • Three Data RAMs with ECC
      • 8 banks of 30 × 32-bit register scratchpad memory
      • Interrupt controller and task manager
      • 2× 64-bit Industrial Ethernet Peripherals (IEPs) for time stamping and other time synchronization functions
      • 18× Sigma-Delta Filter Module (SDFM) interfaces
        • Short circuit logic
        • Over-current logic
      • 6× Multi-protocol position encoder interfaces
      • 1× Enhanced Capture Module (ECAP)
      • 16550-compatible UART
        • Dedicated 192MHz clock to support 12Mbps PROFIBUS
  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Security co-processor (DMSC-L) for key and security management, with dedicated device level interconnect for security
    • Secure watchdog/timer/IPC
    • Extensive firewall support for isolation
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging
  • 6× Inter-Integrated Circuit (I2C) ports
  • 9× Universal Asynchronous Receive/Transmit (UART) modules
  • 1× 12-bit Analog-to-Digital Converters (ADC)
    • Configurable sample rate up to 4MSPS
    • 8× multiplexed analog inputs
  • 7× Multichannel Serial Peripheral Interfaces (SPI) controllers
  • 3× General-Purpose I/O (GPIO) modules
  • 9× Enhanced Pulse-Width Modulator (EPWM) modules
  • 3× Enhanced Capture (ECAP) modules
  • 3× Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2× Modular Controller Area Network (MCAN) modules with full CAN-FD support
  • 2× Fast Serial Interface Transmitter (FSITX) cores
  • 6× Fast Serial Interface Receiver (FSIRX) cores

High-speed interfaces:

  • 1× Integrated Ethernet switch supporting: (CPSW)
    • Up to 2 external Ethernet ports
      • RGMII (10/100/1000)
      • RMII (10/100)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • Energy efficient Ethernet (802.3az)
  • 1× PCI-Express Gen2 controller (PCIE)
    • Supports Gen2 Single Lane operation
  • 1× USB 3.1 Dual-Role Device (DRD) Subsystem (USBSS)
    • Port configurable as USB Host, USB Device, or USB Dual-Role device
    • USB Device: High-speed (480Mbps) and Full-speed (12Mbps)
    • USB Host: SuperSpeed Gen1 (5Gbps), High-speed (480Mbps), Full-speed (12Mbps), and Low-speed (1.5Mbps)
    • Integrated USB VBUS detection
  • 1× Serializer/Deserializer (SERDES)
    • One SERDES PHY lane to support eitherPCI-Express Gen2 or USB SuperSpeed Gen1
  • 2× Multimedia Card/Secure Digital (MMCSD) interfaces
    • One 8-bit for eMMC (MMCSD0)
    • One 4-bit for MMCSD/SDIO (MMCSD1)
    • Integrated analog switch for voltage switching from 3.3V to 1.8V for high-speed cards
  • 1× General-Purpose Memory Controller (GPMC)
    • 16-bit parallel bus with 133MHz clock or
    • 32-bit parallel bus with 100MHz clock
    • Error Location Module (ELM) support
  • 1× Flash Subsystem (FSS) for external memory configurable as either:
    • 1× Octal SPI (OSPI) flash interface
    • or 1× Quad SPI (QSPI) flash interface
  • Simplified power sequencing requirements
  • Dual-voltage I/O Support (3.3V / 1.8V)
  • Integrated SDIO LDO for handling automatic voltage transition for SD interface
  • Integrated voltage supervisor for monitoring over-voltage and under-voltage conditions
  • Integrated power supply glitch detector for detecting fast supply transients

Functional safety:

  • Functional Safety-Compliant
    • Developed for functional safety applications
    • Documentation available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3
    • Hardware integrity up to SIL 2
    • Safety-related certification
    • ECC or parity on calculation-critical memories
    • Built-In Self-Test (BIST) for CPU and on-chip RAM
    • Error Signaling Module (ESM) with dedicated error pin
    • ECC and parity on select internal bus interconnects
    • Run-time safety diagnostics, including:
      • Voltage, Temperature, and Clock Monitoring
      • Windowed Watchdog Timers
      • CRC Engine for memory integrity checks
    • MCU domain with dedicated memory, interfaces, and M4FSS capable of isolation from the larger SoC with Freedom From Interference (FFI) features:
      • Separate interconnect
      • Firewalls and timeout gaskets
      • Controlled reset isolation
      • Dedicated MCU PLL and MMR control
      • Separate I/O voltage supply rail
  • Supports boot from OSPI/QSPI Flash, SPI Flash, parallel NOR Flash, parallel NAND Flash, UART, I2C, MMCSD, eMMC, USB, PCIe, and Ethernet interfaces.
  • 16-nm FinFET technology
  • ALV: 17.2mm × 17.2mm, 0.8mm pitch(441-pin) [Lidded] Flip-Chip Ball Grid Array(FCBGA)
  • ALX: 11.0mm × 11.0mm, 0.5mm pitch(293-pin) [Overmolded] Flip-Chip Chip Scale Package(FCCSP) 
  • Up to 2× Dual-core Arm Cortex-R5F MCU subsystems operating at up to 800MHz, highly-integrated for real-time processing
    • Dual-core Arm Cortex-R5F clusters support dual-core and single-core operation
    • 32KB I-cache and 32KB D-cache per R5F core with SECDED ECC on all memories
    • Single-core: 128KB TCM per cluster (128KB TCM per R5F core)
    • Dual-core: 128KB TCM per cluster (64KB TCM per R5F core)
  • 1× Single-core Arm Cortex-M4F MCU at up to 400MHz
    • 256KB SRAM with SECDED ECC
  • Up to 2MB of On-chip RAM (OCSRAM) with SECDED ECC:
    • Can be divided into smaller banks in increments of 256KB for as many as 8 separate memory banks
    • Each memory bank can be allocated to a single core to facilitate software task partitioning
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4, DDR4 memory types
    • 16-bit data bus with inline ECC
    • Supports speeds up to 1600 MT/s
  • Device Management Security Controller (DMSC-L)
    • Centralized SoC system controller
    • Manages system services including initial boot, security, and clock/reset/power management
    • Communication with various processing units over message manager
    • Simplified interface for optimizing unused peripherals
    • On-Chip Debug functionality through JTAG and Trace interfaces)
  • Data Movement Subsystem (DMSS)
    • Block Copy DMA (BCDMA)
    • Packet DMA (PKTDMA)
    • Secure Proxy (SEC_PROXY)
    • Ring Accelerator (RINGACC)
  • Time Sync Subsystem
    • Central Platform Time Sync (CPTS) module
    • Timer Manager (TIMERMANAGER) with 1024 timers
    • Time Sync and Compare event interrupt routers
  • 2× Gigabit Industrial Communication Subsystems (PRU_ICSSG)
    • Optional support for Profinet IRT, Profinet RT, EtherNet/IP, EtherCAT, Time-Sensitive Networking (TSN), and other Networking Protocols
    • Backwards compatibility with 10/100Mb PRU-ICSS
    • Each PRU_ICSSG contains:
      • 3× PRU RISC Cores per Slice (2× Slice per PRU_ICSSG)
        • PRU General Use core (PRU)
        • PRU Real-Time Unit core (PRU-RTU)
        • PRU Transmit core (PRU-TX)
      • Each PRU core supports the following features:
        • Instruction RAM with ECC
        • Broadside RAM
        • Multiplier with optional accumulator (MAC)
        • CRC16/32 hardware accelerator
        • Byte swap for Big/Little Endian conversion
        • SUM32 hardware accelerator for UDP checksum
        • Task Manager for preemption support
      • Up to 2× Ethernet ports
        • RGMII (10/100/1000)
        • MII (10/100)
      • Three Data RAMs with ECC
      • 8 banks of 30 × 32-bit register scratchpad memory
      • Interrupt controller and task manager
      • 2× 64-bit Industrial Ethernet Peripherals (IEPs) for time stamping and other time synchronization functions
      • 18× Sigma-Delta Filter Module (SDFM) interfaces
        • Short circuit logic
        • Over-current logic
      • 6× Multi-protocol position encoder interfaces
      • 1× Enhanced Capture Module (ECAP)
      • 16550-compatible UART
        • Dedicated 192MHz clock to support 12Mbps PROFIBUS
  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Security co-processor (DMSC-L) for key and security management, with dedicated device level interconnect for security
    • Secure watchdog/timer/IPC
    • Extensive firewall support for isolation
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging
  • 6× Inter-Integrated Circuit (I2C) ports
  • 9× Universal Asynchronous Receive/Transmit (UART) modules
  • 1× 12-bit Analog-to-Digital Converters (ADC)
    • Configurable sample rate up to 4MSPS
    • 8× multiplexed analog inputs
  • 7× Multichannel Serial Peripheral Interfaces (SPI) controllers
  • 3× General-Purpose I/O (GPIO) modules
  • 9× Enhanced Pulse-Width Modulator (EPWM) modules
  • 3× Enhanced Capture (ECAP) modules
  • 3× Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2× Modular Controller Area Network (MCAN) modules with full CAN-FD support
  • 2× Fast Serial Interface Transmitter (FSITX) cores
  • 6× Fast Serial Interface Receiver (FSIRX) cores

High-speed interfaces:

  • 1× Integrated Ethernet switch supporting: (CPSW)
    • Up to 2 external Ethernet ports
      • RGMII (10/100/1000)
      • RMII (10/100)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • Energy efficient Ethernet (802.3az)
  • 1× PCI-Express Gen2 controller (PCIE)
    • Supports Gen2 Single Lane operation
  • 1× USB 3.1 Dual-Role Device (DRD) Subsystem (USBSS)
    • Port configurable as USB Host, USB Device, or USB Dual-Role device
    • USB Device: High-speed (480Mbps) and Full-speed (12Mbps)
    • USB Host: SuperSpeed Gen1 (5Gbps), High-speed (480Mbps), Full-speed (12Mbps), and Low-speed (1.5Mbps)
    • Integrated USB VBUS detection
  • 1× Serializer/Deserializer (SERDES)
    • One SERDES PHY lane to support eitherPCI-Express Gen2 or USB SuperSpeed Gen1
  • 2× Multimedia Card/Secure Digital (MMCSD) interfaces
    • One 8-bit for eMMC (MMCSD0)
    • One 4-bit for MMCSD/SDIO (MMCSD1)
    • Integrated analog switch for voltage switching from 3.3V to 1.8V for high-speed cards
  • 1× General-Purpose Memory Controller (GPMC)
    • 16-bit parallel bus with 133MHz clock or
    • 32-bit parallel bus with 100MHz clock
    • Error Location Module (ELM) support
  • 1× Flash Subsystem (FSS) for external memory configurable as either:
    • 1× Octal SPI (OSPI) flash interface
    • or 1× Quad SPI (QSPI) flash interface
  • Simplified power sequencing requirements
  • Dual-voltage I/O Support (3.3V / 1.8V)
  • Integrated SDIO LDO for handling automatic voltage transition for SD interface
  • Integrated voltage supervisor for monitoring over-voltage and under-voltage conditions
  • Integrated power supply glitch detector for detecting fast supply transients

Functional safety:

  • Functional Safety-Compliant
    • Developed for functional safety applications
    • Documentation available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3
    • Hardware integrity up to SIL 2
    • Safety-related certification
    • ECC or parity on calculation-critical memories
    • Built-In Self-Test (BIST) for CPU and on-chip RAM
    • Error Signaling Module (ESM) with dedicated error pin
    • ECC and parity on select internal bus interconnects
    • Run-time safety diagnostics, including:
      • Voltage, Temperature, and Clock Monitoring
      • Windowed Watchdog Timers
      • CRC Engine for memory integrity checks
    • MCU domain with dedicated memory, interfaces, and M4FSS capable of isolation from the larger SoC with Freedom From Interference (FFI) features:
      • Separate interconnect
      • Firewalls and timeout gaskets
      • Controlled reset isolation
      • Dedicated MCU PLL and MMR control
      • Separate I/O voltage supply rail
  • Supports boot from OSPI/QSPI Flash, SPI Flash, parallel NOR Flash, parallel NAND Flash, UART, I2C, MMCSD, eMMC, USB, PCIe, and Ethernet interfaces.
  • 16-nm FinFET technology
  • ALV: 17.2mm × 17.2mm, 0.8mm pitch(441-pin) [Lidded] Flip-Chip Ball Grid Array(FCBGA)
  • ALX: 11.0mm × 11.0mm, 0.5mm pitch(293-pin) [Overmolded] Flip-Chip Chip Scale Package(FCCSP) 

AM243x is an extension of Sitara’s industrial-grade portfolio into high-performance microcontrollers. The AM243x device is built for industrial applications, such as motor drives and remote I/O modules, which require a combination of real-time communications and processing. The AM243x family provides scalable performance with up to four Cortex-R5F MCUs, one Cortex-M4F, and two instances of Sitara’s gigabit TSN-enabled PRU_ICSSG.

The AM243x SoC architecture was designed to provide best-in-class real-time performance through the high-performance Arm Cortex-R5F cores, Tightly-Coupled Memory (TCM) banks, configurable SRAM partitioning, and dedicated low-latency paths to and from peripherals for rapid data movement in and out of the SoC. This deterministic architecture allows for AM243x to handle the tight control loops found in servo drives while the peripherals like FSI, GPMC, ECAPs, PWMs, and encoder interfaces help enable a number of different architectures found in these systems.

The SoC provides flexible industrial communications capability including full protocol stacks for EtherCAT target, PROFINET device, EtherNet/IP adapter, and IO-Link Controller. The PRU_ICSSG further provides capability for gigabit and TSN based protocols. In addition, the PRU_ICSSG enables additional interfaces including a UART interface, sigma delta decimation filters, and absolute encoder interfaces.

Functional safety features can be enabled through the integrated Cortex-M4F along with dedicated peripherals which can all be isolated from the rest of the SoC. AM243x also supports secure boot.

AM243x is an extension of Sitara’s industrial-grade portfolio into high-performance microcontrollers. The AM243x device is built for industrial applications, such as motor drives and remote I/O modules, which require a combination of real-time communications and processing. The AM243x family provides scalable performance with up to four Cortex-R5F MCUs, one Cortex-M4F, and two instances of Sitara’s gigabit TSN-enabled PRU_ICSSG.

The AM243x SoC architecture was designed to provide best-in-class real-time performance through the high-performance Arm Cortex-R5F cores, Tightly-Coupled Memory (TCM) banks, configurable SRAM partitioning, and dedicated low-latency paths to and from peripherals for rapid data movement in and out of the SoC. This deterministic architecture allows for AM243x to handle the tight control loops found in servo drives while the peripherals like FSI, GPMC, ECAPs, PWMs, and encoder interfaces help enable a number of different architectures found in these systems.

The SoC provides flexible industrial communications capability including full protocol stacks for EtherCAT target, PROFINET device, EtherNet/IP adapter, and IO-Link Controller. The PRU_ICSSG further provides capability for gigabit and TSN based protocols. In addition, the PRU_ICSSG enables additional interfaces including a UART interface, sigma delta decimation filters, and absolute encoder interfaces.

Functional safety features can be enabled through the integrated Cortex-M4F along with dedicated peripherals which can all be isolated from the rest of the SoC. AM243x also supports secure boot.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet AM243x Sitara™ Microcontrollers datasheet (Rev. H) PDF | HTML 19 Dez 2025
* Errata AM64x/AM243x Processor Silicon Revision 1.0, 2.0 (Rev. J) PDF | HTML 13 Nov 2025
Application note Getting Started with Sysconfig Tool PDF | HTML 21 Nov 2025
User guide Hardware Design Considerations for Custom Board Using AM6442, AM6422, AM6412 and AM2434 (ALV, ALX) Processor (Rev. D) PDF | HTML 24 Okt 2025
User guide AM6442 , AM6422 , AM6412 and AM2434 Processor Schematic Design Guidelines and Schematic Review Checklist (Rev. E) PDF | HTML 10 Okt 2025
Application note Custom Board Design and Simulation Guidelines for Processor High Speed Parallel Interfaces (Rev. A) PDF | HTML 05 Sep 2025
Application note Industrial Communication Protocols Supported on TI Processors and MCUs (Rev. F) PDF | HTML 03 Sep 2025
Functional safety information AM6x, AM24x Software Diagnostics Library TÜV SÜD Functional Safety Certificate for 9.2.0 SDK (Rev. A) 17 Jul 2025
Application note Processors Tools Overview PDF | HTML 16 Jun 2025
Functional safety information AM64x, AM243x IEC61508 TUV SUD Functional Safety Certificate 25 Mär 2024
Product overview AM243x OSPI, QSPI Flash Selection Guide (Rev. A) PDF | HTML 06 Feb 2024
Product overview Industrial Communication Protocol Support for Arm®-based Microcontrollers and Processors PDF | HTML 22 Dez 2023
Application note Using TSN Ethernet Features to Improve Timing in Industrial Ethernet Controllers PDF | HTML 15 Nov 2023
Product overview Functional Safety for AM2x and Hercules™ Microcontrollers PDF | HTML 08 Nov 2023
User guide AM64x/AM243x Technical Reference Manual (Rev. H) 01 Nov 2023
Application note Sitara MCU Thermal Design PDF | HTML 11 Sep 2023
Application brief EtherCAT Connected Motor Drive System With Endat 2.2 Absolute Encoder Feedback PDF | HTML 07 Sep 2023
Application note Integration of MbedTLS on SITARA MCU Devices PDF | HTML 03 Aug 2023
White paper Time Sensitive Networking for Industrial Automation (Rev. C) 31 Jul 2023
User guide 10-kW, Three-Phase, Three-Level (T-Type) Inverter Using AM263 PDF | HTML 11 Jul 2023
Certificate BP-AM2BLDCSERVO EU Declaration of Conformity (DoC) 28 Jun 2023
Application note Powering the AM243x With the TPS65219 PMIC PDF | HTML 26 Jun 2023
Application note Intra Drive Communication Using 8b-10b Line Code With Programmable Real Time Uni PDF | HTML 24 Mai 2023
Application note High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 24 Feb 2023
Application note FSI Bandwidth-Optimization for Multi-axis Servo Control PDF | HTML 14 Dez 2022
Application note Debugging Sitara AM2x Microcontrollers PDF | HTML 24 Okt 2022
Application note PRU-ICSS Feature Comparison (Rev. G) PDF | HTML 11 Okt 2022
Application note Optimized Trigonometric Functions on TI Arm Cores (Rev. A) PDF | HTML 08 Aug 2022
Application note AM64x/AM243x Extended Power-On Hours PDF | HTML 05 Aug 2022
Application note AM243x/AM64x Single Chip Motor Control Benchmark PDF | HTML 30 Mär 2022
Application note Using LP8733xx and TPS65218xx PMICs to Power AM64x and AM243x Sitara Processors PDF | HTML 16 Feb 2022
White paper Utilizing Sitara Processors and Microcontrollers for Industry 4.0 Servo Drives (Rev. C) 06 Okt 2021
White paper Revolutionizing Real-Time Control, Networking and Analytics w/ Sitara™ AM2x MCUs PDF | HTML 07 Jul 2021
Application note AM64x/AM243x DDR Board Design and Layout Guidelines (Rev. A) PDF | HTML 01 Jul 2021
Application note AM64x/AM243x Power Estimation Tool (Rev. A) PDF | HTML 01 Jul 2021
More literature LaunchPad™ kit with Sitara™ AM243x MCU Pinout Map 18 Jun 2021
User guide AM64x/AM243x BGA Escape Routing (Rev. A) PDF | HTML 06 Apr 2021
Functional safety information The state of functional safety in Industry 4.0 27 Nov 2018

Design und Entwicklung

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BOOSTXL-IOLINKM-8 — BoosterPack™ für IO-Link mit acht Ports

Dieses BoosterPack™ wurde für den Betrieb mit dem LP-AM243 TI LaunchPad™ Kit mit Sitara™ AM243x MCU entwickelt. Zusammengenommen implementiert dieses Design einen IO-Link-Master mit acht Ports, schnellem und deterministischem Timing sowie unabhängiger Zyklus- und Bitratenkonfiguration. Dieses (...)

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BP-AM2BLDCSERVO — AM2x Brushless-DC (BLDC) Servo Motor BoosterPack

The AM2x BLDC Servo Motor BoosterPack plug-in module is an add-on for the AM2x LaunchPad development kits. This BoosterPack provides up to two axes of 24V/8A BLDC driver, ADC/SDFM current feedback, industrial absolute encoder, and resolver feedback. 

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LP-AM243 — AM243x Universal-LaunchPad™-Development Kit für Arm®-basierte MCU

LP-AM243 ist eine Entwicklungsplatine für Sitara™-Hochleistungs-Mikrocontroller der Serie AM243x. Diese Platine eignet sich ideal für die Erstevaluierung und das Prototyping, da Sie eine standardisierte und einfach zu handhabende Plattform für die Entwicklung Ihrer nächsten Anwendung bietet. Das (...)

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RIO-DEV-PLATFORM — Remote IO development platform for Arm-based MCUs with industrial Ethernet

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TMDS243DC01EVM — AM243x & AM64x Evaluierungsmodul-Breakout-Platine für Hochgeschwindigkeitserweiterung

TMDS243DC01EVM ist das Hochgeschwindigkeits-Erweiterungs-Evaluierungsmodul (HSE) für AM243x Produkte. Dieses EVM ist eine Zusatzplatine für das AM243x EVM (TMDS243EVM).

Das TMDS243DC01EVM umfasst einen universellen Signalausbruch, der den Testzugriff auf alle E/A-Signale des TMDS243EVM-HSE-Steckers (...)

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Evaluierungsplatine

TMDS243EVM — AM243x Evaluierungsmodul für Arm® Cortex®-R5F-basierte MCUs

Das Evaluierungsmodul (EVM) TMDS243 ist eine eigenständige Test- und Entwicklungsplattform. Es dient dazu, die Funktionalität der AM243x-Produktfamilie zu evaluieren und Prototypen für eine Vielzahl von Anwendungen zu entwickeln. Das TMDS243EVM ist mit einer Sitara™ (...)

Benutzerhandbuch: PDF | HTML
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Evaluierungsplatine

TMDS64DC01EVM — AM64x IO-Link und Hochgeschwindigkeits-Breakout-Karte

The AM64x IO-Link and high speed expansion board is an add-on module for the AM64x GP EVM.  This board includes eight (8) IO-Link ports and general purpose signal breakout.  The Breakout board section provides the test access to all the IO signals included on the High Speed Expansion (...)

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Evaluierungsplatine

PHYTC-3P-KIT-AM64 — phyBOARD®-AM64x Entwicklungskit

PhyBOARD®-AM64x Entwicklungskit ist ein System auf Moduel (SOM) und Carrier Board mit dem phyCORE®-AM64x, einer robusten und zuverlässigen Embedded-Prozessorplatine für Headless-Industriekommunikationssysteme. Der 50 mm x 37 mm SOM verfügt über eine umfangreiche 280-polige Verbindung, die gängige (...)

Von: PHYTEC
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Evaluierungsplatine

TQ-3P-SITARASOMS — Sitara-SOMs der TQ-Gruppe

TQ offers the complete range of services from development, through production and service right up to product life cycle management. The services cover assemblies, equipment and systems including hardware, software and mechanics. Customers can obtain all services from TQ on a modular basis as (...)
Von: TQ-Group
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Evaluierungsplatine

TQ-3P-SOM-TQMA243XL — TQ-Group TQMa243xL system on module for AM2434 Arm-based microcontroller

The embedded module TQMA243XL, is based on the processor family AM243x quad-core Arm® Cortex®-R5F-based MCU. This LGA (land grid array) module is designed to use the pin compatible processors on one module design. This module is ideally suited for headless applications with extended (...)

Von: TQ-Group
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Debug-Tastkopf

TMDSEMU110-U — XDS110 JTAG-Debug-Tastkopf

Der XDS110 von Texas Instruments ist eine neue Klasse von Debug-Tastkopf (Emulator) für Embedded-Prozessoren von TI. Der XDS110 ersetzt die XDS100-Familie und unterstützt eine größere Anzahl von Standards (IEEE1149.1, IEEE1149.7, SWD) in einem einzigen Pod. Alle XDS-Debug-Tastköpfe unterstützen (...)

Benutzerhandbuch: PDF
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Debug-Tastkopf

TMDSEMU560V2STM-U — XDS560v2 System-Trace-USB-Debug-Tastkopf

Der XDS560v2 ist die leistungsstärkste Debug-Sonde aus der XDS560™ Familie von Debug-Sonden und unterstützt sowohl den traditionellen JTAG-Standard (IEEE1149.1) als auch cJTAG (IEEE1149.7).  Bitte beachten: Diese Lösung unterstützt kein Serial Wire Debug (SWD).

Alle XDS-Debug-Tastköpfe unterstützen (...)

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Debug-Tastkopf

TMDSEMU560V2STM-UE — XDS560v2 System-Trace-USB-und Ethernet-Debug-Tastkopf

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

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Debug-Tastkopf

LB-3P-TRACE32-ARM — Debug- und Trace-System Lauterbach TRACE32® für Arm®-basierte Mikrocontroller und Prozessoren

Die TRACE32®-Tools von Lauterbach sind eine Suite hochmoderner Hardware- und Softwarekomponenten, mit denen Entwickler alle Arten von Arm®-basierten Mikrocontrollern und Prozessoren analysieren, optimieren und zertifizieren können. Die weltweit anerkannten Debugging- und Trace-Lösungen für (...)

Von: Lauterbach GmbH
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Debug-Tastkopf

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

Von: TASKING Germany GmbH
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Software-Entwicklungskit (SDK)

IBV-3P-ICECAT — IBV EtherCAT MainDevice SDK für eingebettete Systeme

The icECAT EtherCAT Master Stack library by IBV is a Software Development Kit (SDK) for creating an EtherCAT MainDevice (master) system achieving best performance with lowest resource usage. It is especially designed for use on embedded systems with optimized Link Layer drivers with DMA support (...)
Von: IBV - Echtzeit- und Embedded GmbH & Co. KG
Partner-Website besuchen
Software-Entwicklungskit (SDK)

INDUSTRIAL-COMMUNICATIONS-SDK-AM243X — Industrial Communications SDK for AM243x - RTOS

This software development kit (SDK) includes real-time industrial communication protocols (EtherCAT, EtherNet/IP, PROFINET, IO-Link, etc.) on TI processors. It also has PRU-ICSS firmware, drivers, communication stack libraries, and application examples, along with documentation.

What's new:

  • (...)
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Software-Entwicklungskit (SDK)

MCU-PLUS-SDK-AM243X — MCU+ SDK for AM243x – RTOS, No-RTOS

The AM243x microcontroller (MCU) software is a collection of software development kits (SDK) providing a software platform for TI embedded processors with easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. This software accelerates application development (...)

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Software-Entwicklungskit (SDK)

MOTOR-CONTROL-SDK-AM243X — Motor Control SDK for AM243x - RTOS

The AM243x microcontroller (MCU) software is a collection of software development kits (SDK) providing a software platform for TI embedded processors with easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. This software accelerates application development (...)

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Firmware

USIT-3P-SECIC-HSM — Uni-Sentry SecIC-HSM Firmware

Das SecIC-HSM wurde entwickelt, um die für MCU-/SoC-Chips erforderlichen Cybersicherheitsanforderungen zu erfüllen. Die HSM-Firmware kann in Bereichen wie Automobil, alternative Energieerzeugung, Photovoltaik, Robotik, Gesundheitswesen und Luftfahrt eingesetzt werden. Zu den bereitgestellten (...)
Von: Shanghai Uni-Sentry Intelligent Technology Co., LTD
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Erste Schritte

TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
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IDE, Konfiguration, Compiler oder Debugger

CCSTUDIO — Code Composer Studio integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

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IDE, Konfiguration, Compiler oder Debugger

DDR-CONFIG-AM24 — DDR Configuration Tool

This SysConfig based tool simplifies the process of configuring the DDR Subsystem Controller and PHY to interface to SDRAM devices. Based on the memory device, board design, and topology the tool outputs files to initialize and train the selected memory.
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IDE, Konfiguration, Compiler oder Debugger

IAR-KICKSTART — IAR Embedded Workbench

IAR Embedded Workbench bietet eine komplette Entwicklungs-Toolchain für Erstellung und Debugging von Embedded-Anwendungen für den von Ihnen gewählten Ziel-Mikrocontroller. Der inkludierte IAR C/C++ Compiler generiert hochoptimierten Code für Ihre Anwendung, und der C-SPY Debugger ist ein (...)
Von: IAR Systems
Benutzerhandbuch: PDF
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IDE, Konfiguration, Compiler oder Debugger

SYSCONFIG — Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

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Onlineschulungen

AM24X-ACADEMY — AM24x Academy

AM24x Academy features easy-to-use training modules ranging from the basics of getting started to advanced development topics.
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Betriebssystem (BS)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
Von: Green Hills Software
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Software-Programmiertool

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

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Support-Software

SPRCAJ9 — AM243x SW Build Sheet

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Simulationsmodell

AM243x BSDL Model

SPRM781.ZIP (17 KB) - BSDL Model
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Simulationsmodell

AM243x IBIS model (Rev. B)

SPRM783B.ZIP (263 KB) - IBIS Model
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Simulationsmodell

AM243x Thermal Model

SPRM782.ZIP (1 KB) - Thermal Model
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Simulationsmodell

AM64x/AM243x BSDL Model

SPRM732.ZIP (21 KB) - BSDL Model
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Simulationsmodell

AM64x/AM243x IBIS Model (Rev. E)

SPRM730E.ZIP (1889 KB) - IBIS Model
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Simulationsmodell

AM64x/AM243x SR2.0 BSDL Model

SPRM811.ZIP (21 KB) - BSDL Model
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Berechnungstool

SPRM779 — AM64x Power Estimation Tool

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Referenzdesigns

TIDA-010256 — Referenzdesign für 128-Kanal-Ultraschalltransmittersystem

In diesem Ultraschallübertragungs-Referenzdesign werden der fünfstufige Impulstransmitter TX7516 von TI und der Hochspannungs-Schalter TMUX9832 verwendet. Transmitter und Schalter sind auf 1:4-Art verbunden, um die kompakten Hardware-Designanforderungen für analoge Ultraschall-Frontend-Systeme mit (...)
Design guide: PDF
Referenzdesigns

TIDA-010234 — Referenzdesign für E/A-Link-Master mit acht Ports

Dieses Referenzdesign implementiert einen IO-Link-Master mit schnellem und deterministischem Timing mit acht Ports. Jeder Port kann mit unabhängiger Bitrate und Zykluszeitsteuerung betrieben werden. Dieses Design kann verwendet werden, um ein Remote-E/A-Gateway für die Verbindung mit OPC UA, (...)
Design guide: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
FCBGA (ALV) 441 Ultra Librarian
FCCSP (ALX) 293 Ultra Librarian
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