LMG1208

The LMG1208 is a robust floating half-bridge gate driver designed to drive two N-channel MOSFETs or enhancement mode GaN FETs with an absolute maximum bootstrap voltage of 120V. The device has 4.5A peak source and 5.5A peak sink current capability at 12V, allowing the LMG1208 to drive large power MOSFETs with minimized switching losses during the transition through the Miller Plateau. The switching nodes (HS, LS pins) can handle negative transient voltage, which protects the two floating domains from inherent negative voltages caused by parasitic inductance and stray capacitance.

The device, configured using a MODE pin, operates a variety of modes, such as independent input (IIM), single PWM, HSC_HS (hybrid switched-capacitor converter high side responder), HSC_LS (hybrid switched-capacitor converter low side responder), and HI LI inversion, giving the user complete flexibility to adopt the device in numerous topologies. The LMG1208 integrates a high-voltage high common mode support differential current sense amplifier with transconductance gain of 5uA/mV that can be used for inductor DCR or shunt based current sensing.

The PWM inputs support tri-state logic and can be interfaced to 3.3V PWM controllers independent of the operating supply voltage (5V or 12V). The low-side and high-side gate driver paths are matched to 5ns between the turn on and turn off of each other and are controlled through the EN/INL and PWM/INH input pins respectively. User can program the dead time in the range of 8ns to 100ns in single PWM mode using resistor to ground on DT pin. Same DT pin introduces rising edge delay on incoming PWM signals allowing dead time insertion in IIM mode and HSC modes as well. On-chip 120V rated bootstrap synchronous FET eliminates the need to add discrete bootstrap diode for HB domain. Bootstrap charging is controlled to prevent the gate voltage from exceeding the GaN FET maximum gate-to-source voltage rating. Device integrates robust level shifters from VDD to (LB-LS) and VDD to (HB-HS) domains. Undervoltage lockout (UVLO) is provided for VDD and for both the high-side (HB-HS) and the low-side (LB-LS) driver supply which forces the outputs low if the drive voltage is below the specified threshold.