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Analogschalter und Multiplexer

SN74CBTLV3257-EP

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Verbessertes Produkt – FET-Multiplexer-/Demultiplexer, 1 aus 2, niedrige Spannung, 4 Bit

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Datenblatt

SN74CBTLV3257-EP

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Produktdetails

Configuration 2:1 SPDT Number of channels 4 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Ron (typ) (Ω) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -55 to 125 Features Powered-off protection Input/output continuous current (max) (mA) 128 Rating HiRel Enhanced Product Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration 2:1 SPDT Number of channels 4 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Ron (typ) (Ω) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -55 to 125 Features Powered-off protection Input/output continuous current (max) (mA) 128 Rating HiRel Enhanced Product Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
TSSOP (PW) 16 32 mm² 5 x 6.4
  • Controlled baseline
    • One assembly site
    • One test site
    • One fabrication site
  • Extended temperature performance of –55°C to 125°C
  • Enhanced diminishing manufacturing sources (DMS) support
  • Enhanced product-change notification
  • Qualification pedigree (1)
  • 5-Ω switch connection between two ports
  • Rail-to-rail switching on data I/O ports
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000-V human-body model (A114-A)
    • 200-V machine model (A115-A)

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
  • Controlled baseline
    • One assembly site
    • One test site
    • One fabrication site
  • Extended temperature performance of –55°C to 125°C
  • Enhanced diminishing manufacturing sources (DMS) support
  • Enhanced product-change notification
  • Qualification pedigree (1)
  • 5-Ω switch connection between two ports
  • Rail-to-rail switching on data I/O ports
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000-V human-body model (A114-A)
    • 200-V machine model (A115-A)

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

The SN74CBTLV3257 is a 4-bit 1-of-2 high-speed FET multiplexer/demultiplexer. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The select (S) input controls the data flow. The FET multiplexers/demultiplexers are disabled when the output-enable (OE) input is high.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current does not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTLV3257 is a 4-bit 1-of-2 high-speed FET multiplexer/demultiplexer. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The select (S) input controls the data flow. The FET multiplexers/demultiplexers are disabled when the output-enable (OE) input is high.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current does not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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Technische Dokumentation

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Typ Titel Datum
* Data sheet SN74CBTLV3257-EP Low-Voltage 4-Bit 1-of-2 FET Multiplexer/Demultiplexer datasheet (Rev. A) PDF | HTML 06 Mai 2019
* VID SN74CBTLV3257-EP VID V6208615 21 Jun 2016
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dez 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dez 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Digital Bus Switch Selection Guide (Rev. A) 10 Nov 2004
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note Bus FET Switch Solutions for Live Insertion Applications 07 Feb 2003
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
User guide CBT (5-V) And CBTLV (3.3-V) Bus Switches Data Book (Rev. B) 01 Dez 1998

Design und Entwicklung

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