This 8-bit noninverting bus transceiver uses two separate configurable power-supply
rails. The SN74LVC8T245-EP is optimized to operate with VCCA and
VCCB set at 1.65 V to 5.5 V. The A port is designed to track
VCCA. VCCA accepts any supply voltage from 1.65 V to
5.5 V. The B port is designed to track VCCB. VCCB
accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage
bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes.
The SN74LVC8T245-EP is designed for asynchronous communication between two data buses.
The logic levels of the direction-control (DIR) input and the output-enable
(OE) input activate either the B-port outputs or the A-port outputs or place
both output ports into the high-impedance mode. The device transmits data from the A bus to the B
bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs
are activated. The input circuitry on both A and B ports is always active and must have a logic
HIGH or LOW level applied to prevent excess ICC and
ICCZ.
The SN74LVC8T245-EP is designed so that the control pins (DIR and
OE) are supplied by VCCA.
This device is fully specified for partial-power-down applications using
Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either
VCC input is at GND, all outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the
driver.
This 8-bit noninverting bus transceiver uses two separate configurable power-supply
rails. The SN74LVC8T245-EP is optimized to operate with VCCA and
VCCB set at 1.65 V to 5.5 V. The A port is designed to track
VCCA. VCCA accepts any supply voltage from 1.65 V to
5.5 V. The B port is designed to track VCCB. VCCB
accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage
bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes.
The SN74LVC8T245-EP is designed for asynchronous communication between two data buses.
The logic levels of the direction-control (DIR) input and the output-enable
(OE) input activate either the B-port outputs or the A-port outputs or place
both output ports into the high-impedance mode. The device transmits data from the A bus to the B
bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs
are activated. The input circuitry on both A and B ports is always active and must have a logic
HIGH or LOW level applied to prevent excess ICC and
ICCZ.
The SN74LVC8T245-EP is designed so that the control pins (DIR and
OE) are supplied by VCCA.
This device is fully specified for partial-power-down applications using
Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either
VCC input is at GND, all outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the
driver.