Startseite Schnittstelle Andere Schnittstellen

SN75LVDS84A

AKTIV

FlatLink™-Sender

Produktdetails

Protocols Catalog Rating Catalog Operating temperature range (°C) 0 to 70
Protocols Catalog Rating Catalog Operating temperature range (°C) 0 to 70
TSSOP (DGG) 48 101.25 mm² 12.5 x 8.1
  • 21:3 Data Channel Compression at up to 196 Million Bytes per Second Throughput
  • Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display With Very Low EMI
  • 21 Data Channels Plus Clock In Low-Voltage TTL Inputs and 3 Data Channels Plus Clock Out Low-Voltage Differential Signaling (LVDS) Outputs
  • Operates From a Single 3.3-V Supply and 89 mW (Typ)
  • Ultralow-Power 3.3-V CMOS Version of the SN75LVDS84. Power Consumption About One Third of the 'LVDS84
  • Packaged in Thin Shrink Small-Outline Package (TSSOP) With 20 Mil Terminal Pitch
  • Consumes Less Than 0.54 mW When Disabled
  • Wide Phase-Lock Input Frequency Range: 31 MHz to 75 MHz
  • No External Components Required for PLL
  • Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
  • SSC Tracking Capability of 3% Center Spread at 50-kHz Modulation Frequency
  • Improved Replacement for SN75LVDS84 and NSC's DS90CF363A 3-V Device
  • Available in Q-Temp Automotive
    High Reliability Automotive Applications
    Configuration Control / Print Support
    Qualification to Automotive Standards

FlatLink is a trademark of Texas Instruments.

  • 21:3 Data Channel Compression at up to 196 Million Bytes per Second Throughput
  • Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display With Very Low EMI
  • 21 Data Channels Plus Clock In Low-Voltage TTL Inputs and 3 Data Channels Plus Clock Out Low-Voltage Differential Signaling (LVDS) Outputs
  • Operates From a Single 3.3-V Supply and 89 mW (Typ)
  • Ultralow-Power 3.3-V CMOS Version of the SN75LVDS84. Power Consumption About One Third of the 'LVDS84
  • Packaged in Thin Shrink Small-Outline Package (TSSOP) With 20 Mil Terminal Pitch
  • Consumes Less Than 0.54 mW When Disabled
  • Wide Phase-Lock Input Frequency Range: 31 MHz to 75 MHz
  • No External Components Required for PLL
  • Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
  • SSC Tracking Capability of 3% Center Spread at 50-kHz Modulation Frequency
  • Improved Replacement for SN75LVDS84 and NSC's DS90CF363A 3-V Device
  • Available in Q-Temp Automotive
    High Reliability Automotive Applications
    Configuration Control / Print Support
    Qualification to Automotive Standards

FlatLink is a trademark of Texas Instruments.

The SN75LVDS84A and SN65LVDS84AQ FlatLink transmitters contains three 7-bit parallel-load serial-out shift registers, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits of single-ended LVTTL data to be synchronously transmitted over 3 balanced-pair conductors for receipt by a compatible receiver, such as the SN75LVDS82 or SN75LVDS86/86A.

When transmitting, data bits D0 - D20 are each loaded into registers of the 'LVDS84A upon the falling edge. The internal PLL is frequency-locked to CLKIN and then used to unload the data registers in 7-bit slices. The three serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.

The 'LVDS84A requires no external components and little or no control. The data bus appears the same at the input to the transmitter and output of the receiver with the data transmission transparent to the user(s). The only user intervention is the possible use of the shutdown/clear (SHTDN\) active-low input to inhibit the clock and shut off the LVDS output drivers for lower power consumption. A low-level on this signal clears all internal registers to a low level.

The SN75LVDS84A is characterized for operation over ambient free-air temperatures of 0°C to 70°C. The SN65LVDS84AQ is characterized for operation over the full Automotive temperature range of -40°C to 125°C.

The SN75LVDS84A and SN65LVDS84AQ FlatLink transmitters contains three 7-bit parallel-load serial-out shift registers, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits of single-ended LVTTL data to be synchronously transmitted over 3 balanced-pair conductors for receipt by a compatible receiver, such as the SN75LVDS82 or SN75LVDS86/86A.

When transmitting, data bits D0 - D20 are each loaded into registers of the 'LVDS84A upon the falling edge. The internal PLL is frequency-locked to CLKIN and then used to unload the data registers in 7-bit slices. The three serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.

The 'LVDS84A requires no external components and little or no control. The data bus appears the same at the input to the transmitter and output of the receiver with the data transmission transparent to the user(s). The only user intervention is the possible use of the shutdown/clear (SHTDN\) active-low input to inhibit the clock and shut off the LVDS output drivers for lower power consumption. A low-level on this signal clears all internal registers to a low level.

The SN75LVDS84A is characterized for operation over ambient free-air temperatures of 0°C to 70°C. The SN65LVDS84AQ is characterized for operation over the full Automotive temperature range of -40°C to 125°C.

Herunterladen Video mit Transkript ansehen Video

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 1
Typ Titel Datum
* Data sheet Flatlink Transmitter datasheet (Rev. E) 18 Jan 2001

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Simulationsmodell

SN75LVDS84 IBIS Model

SLLC106.ZIP (5 KB) - IBIS Model
Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Simulationstool

TINA-TI — SPICE-basiertes analoges Simulationsprogramm

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Benutzerhandbuch: PDF
Gehäuse Pins Herunterladen
TSSOP (DGG) 48 Optionen anzeigen

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Empfohlene Produkte können Parameter, Evaluierungsmodule oder Referenzdesigns zu diesem TI-Produkt beinhalten.

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos