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SN74AUP1G08-Q1

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Compuerta AND automotriz de 1 canal y 2 entradas de 0.8 V a 3.6 V y baja potencia (<1 uA)

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SN74AUP1G08-Q1

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Detalles del producto

Technology family AUP Number of channels 1 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
Technology family AUP Number of channels 1 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
SOT-SC70 (DCK) 5 4.2 mm² (2 mm × 2.1 mm)
  • AEC-Q100 Qualified with the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Available in the Texas Instruments NanoStar Package
  • Low Static-Power Consumption:
    ICC = 0.9 µA Max
  • Low Dynamic-Power Consumption:
    Cpd = 4.3 pF Typ at 3.3 V
  • Low Input Capacitance: Ci = 1.5 pF Typ
  • Low Noise: Overshoot and Undershoot
    < 10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Schmitt-Trigger Action Allows Slow Input Transition and Better
    Switching Noise Immunity at the Input (Vhys = 250 mV, Typ at
    3.3 V)
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V Input/Output (I/O) Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.3 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD-78, Class II

NanoStar is a trademark of Texas Instruments.
  • AEC-Q100 Qualified with the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Available in the Texas Instruments NanoStar Package
  • Low Static-Power Consumption:
    ICC = 0.9 µA Max
  • Low Dynamic-Power Consumption:
    Cpd = 4.3 pF Typ at 3.3 V
  • Low Input Capacitance: Ci = 1.5 pF Typ
  • Low Noise: Overshoot and Undershoot
    < 10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Schmitt-Trigger Action Allows Slow Input Transition and Better
    Switching Noise Immunity at the Input (Vhys = 250 mV, Typ at
    3.3 V)
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V Input/Output (I/O) Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.3 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD-78, Class II

NanoStar is a trademark of Texas Instruments.

The AUP family is TI’s premier solution to the low-power needs of the industry in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

This single 2-input positive-AND gate performs the Boolean function: Y = A • B or Y = A\ + B\ in positive logic.

NanoStar package technology is a major breakthrough in integrated circuit (IC) packaging concepts, because it uses the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The AUP family is TI’s premier solution to the low-power needs of the industry in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

This single 2-input positive-AND gate performs the Boolean function: Y = A • B or Y = A\ + B\ in positive logic.

NanoStar package technology is a major breakthrough in integrated circuit (IC) packaging concepts, because it uses the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos LOW-POWER SINGLE 2-INPUT POSITIVE AND GATE datasheet 12/12/2012
Más documentación Automotive Logic Devices Brochure 27/08/2014

Diseño y desarrollo

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Placa de evaluación

5-8-LOGIC-EVM — Módulo de evaluación de lógico genérico para encapsulados DCK, DCT, DCU, DRL y DBV,de 5- a 8-pines

EVM flexible diseñado para admitir cualquier dispositivo que tenga un encapsulado DCK, DCT, DCU, DRL o DBV y entre 5 y 8 pines.
Guía del usuario: PDF
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Modelo de simulación

SN74AUP1G08 Behavioral SPICE Model

SCEM690.ZIP (7 KB) - Modelo PSpice
Productos y hardware compatibles
Modelo de simulación

SN74AUP1G08 IBIS Model (Rev. A)

SCEM405 (361 KB) - Modelo IBIS
Productos y hardware compatibles
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOT-SC70 (DCK) 5 Ultra Librarian
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Pedidos y calidad

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