LPC662
|
Rail-to-rail output swing |
|
|
Micropower operation (<0.5 mW) |
|
|
Specified for 100 k |
|
|
High voltage gain |
120 dB |
|
Low input offset voltage |
3 mV |
|
Low offset voltage drift |
1.3 µV/°C |
|
Ultra low input bias current |
2 fA |
|
Input common-mode includes GND |
|
|
Operating range from +5V to +15V |
|
|
Low distortion |
0.01% at 1 kHz |
|
Slew rate |
0.11 V/µs |
|
Full military temperature range available |
The LPC662 CMOS Dual operational amplifier is ideal for operation from a single supply. It features a wide range of operating voltage from +5V to +15V, rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input VOS, drift, and broadband noise as well as voltage gain (into 100 k
and 5 k
) are all equal to or better than widely accepted bipolar equivalents, while the power supply requirement is typically less than 0.5 mW.
This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.
See the LPC660 datasheet for a Quad CMOS operational amplifier and LPC661 for a single CMOS operational amplifier with these same features.
技術資料
| 上位の文書 | タイプ | タイトル | フォーマットオプション | 最新の英語版をダウンロード | 日付 | |
|---|---|---|---|---|---|---|
| * | データシート | LPC662 Low Power CMOS Dual Operational Amplifier (jp) データシート (Rev. B 翻訳版) | 英語版 (Rev.B) | PDF | HTML | 2004年 5月 1日 |
購入と品質
- RoHS
- REACH
- デバイスのマーキング
- リード端子の仕上げ / ボールの原材料
- MSL 定格 / ピーク リフロー
- MTBF/FIT 推定値
- 使用材料
- 認定試験結果
- 継続的な信頼性モニタ試験結果
- ファブ拠点
- アセンブリ拠点