ホーム ロジックと電圧変換 バッファ、ドライバ、トランシーバ 非反転バッファとドライバ
ホーム
ロジックと電圧変換
バッファ、ドライバ、トランシーバ
非反転バッファとドライバ

SN74ABT244A-EP

アクティブ

エンハンスド製品、TTL 互換 CMOS 入力、3 ステート出力、8 チャネル、4.5V ～ 5.5V バッファ

ご注文はこちら
データシート

SN74ABT244A-EP

アクティブ
データシート ご注文はこちら

製品詳細

Technology family ABT Number of channels 8 IOL (max) (mA) 48 Supply current (max) (µA) 30000 IOH (max) (mA) -24 Input type TTL-Compatible CMOS Output type 3-State Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Technology family ABT Number of channels 8 IOL (max) (mA) 48 Supply current (max) (µA) 30000 IOH (max) (mA) -24 Input type TTL-Compatible CMOS Output type 3-State Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
SSOP (DB) 20 56.16 mm² (7.2 mm × 7.8 mm)
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25°C
  • High-Drive Outputs (-24-mA IOH, 48-mA IOL)
  • Packaged in Shrink Small-Outline (DB) Package

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

EPIC-IIB is a trademark of Texas Intruments.
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25°C
  • High-Drive Outputs (-24-mA IOH, 48-mA IOL)
  • Packaged in Shrink Small-Outline (DB) Package

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

EPIC-IIB is a trademark of Texas Intruments.

This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the SN54ABT240, SN74ABT240A, SN54ABT241, and SN74ABT241A, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary OE and OE inputs.

The SN74ABT244A is organized as two 4-bit buffers/line drivers with separate OE inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74ABT244 is characterized for operation over the full military temperature range of -55°C to 125°C.

This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the SN54ABT240, SN74ABT240A, SN54ABT241, and SN74ABT241A, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary OE and OE inputs.

The SN74ABT244A is organized as two 4-bit buffers/line drivers with separate OE inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74ABT244 is characterized for operation over the full military temperature range of -55°C to 125°C.

filter その他の 非反転バッファとドライバ を検索
ダウンロード 字幕付きのビデオを表示 ビデオ

技術資料

結果が見つかりませんでした。検索条件をクリアしてから、再度検索を試してください。
2 をすべて表示
上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート SN74ABT244A-EP データシート (Rev. A) 2006/07/14
* VID SN74ABT244A-EP VID V6206667 2016/06/21

設計と開発

その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。

パッケージ ピン数 CAD シンボル、フットプリント、および 3D モデル
SSOP (DB) 20 Ultra Librarian
TI の評価基板に関する標準契約約款が適用されます。

購入と品質

サポートとトレーニング

TI E2E™ フォーラムでは、TI のエンジニアからの技術サポートを提供

投稿されたすべてのフォーラムトピック (英語) を表示

コンテンツは、TI 投稿者やコミュニティ投稿者によって「現状のまま」提供されるもので、TI による仕様の追加を意図するものではありません。使用条件をご確認ください。

TI 製品の品質、パッケージ、ご注文に関するお問い合わせは、TI サポートをご覧ください。​​​​​​​​​​​​​​

ビデオ