CDCEL925
- Member of Programmable Clock Generator Family
- CDCEx913: 1-PLL, 3 Outputs
- CDCEx925: 2-PLL, 5 Outputs
- CDCEx925: 3-PLL, 7 Outputs
- CDCEx949: 4-PLL, 9 Outputs
- In-System Programmability and EEPROM
- Serial Programmable Volatile Register
- Nonvolatile EEPROM to Store Customer Settings
- Flexible Input Clocking Concept
- External Crystal: 8 MHz to 32 MHz
- On-Chip VCXO: Pull Range ±150 ppm
- Single-Ended LVCMOS Up to 160 MHz
- Free Selectable Output Frequency Up to 230 MHz
- Low-Noise PLL Core
- PLL Loop Filter Components Integrated
- Low Period Jitter (Typical 60 ps)
- Separate Output Supply Pins
- CDCE925: 3.3 V and 2.5 V
- CDCEL925: 1.8 V
- Flexible Clock Driver
- Three User-Definable Control Inputs [S0/S1/S2], for Example, SSC Selection, Frequency Switching, Output Enable, or Power Down
- Generates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth®, WLAN, Ethernet™, and GPS
- Generates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPs
- Programmable SSC Modulation
- Enables 0-PPM Clock Generation
- 1.8-V Device Power Supply
- Wide Temperature Range: –40°C to 85°C
- Packaged in TSSOP
- Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™)
- APPLICATIONS
- D-TVs, STBs, IP-STBs, DVD Players, DVD Recorders, and Printers
All other trademarks are the property of their respective owners
The CDCE925 and CDCEL925 are modular PLL-based low-cost, high-performance, programmable clock synthesizers, multipliers, and dividers. They generate up to five output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using up to two independent configurable PLLs.
The CDCEx925 has a separate output supply pin, VDDOUT, which is 1.8 V for CDCEL925 and 2.5 V to 3.3 V for CDCE925.
The input accepts an external crystal or LVCMOS clock signal. In case of a crystal input, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF. Additionally, an on-chip VCXO is selectable which allows synchronization of the output frequency to an external control signal, that is, PWM signal.
The deep M/N divider ratio allows the generation of zero-ppm audio/video, networking (WLAN, Bluetooth, Ethernet, GPS), or interface (USB, IEEE1394, memory stick) clocks from a 27-MHz reference input frequency, for example.
All PLLs support SSC (spread-spectrum clocking). SSC can be center-spread or down-spread clocking, which is a common technique to reduce electromagnetic interference (EMI).
Based on the PLL frequency and the divider settings, the internal loop filter components are automatically adjusted to achieve high stability and optimized jitter transfer characteristic of each PLL.
The device supports nonvolatile EEPROM programming for easy customization of the device in the application. It is preset to a factory default configuration and can be reprogrammed to a different application configuration before it goes onto the PCB or reprogrammed by in-system programming. All device settings are programmable through the SDA/SCL bus, a 2-wire serial interface.
Three, free programmable control inputs, S0, S1, and S2, can be used to select different frequencies, or change the SSC setting for lowering EMI, or other control features like outputs disable to low, outputs in high-impedance state, power down, PLL bypass, and so forth.
The CDCx925 operates in a 1.8-V environment and in a temperature range of –40°C to 85°C.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | CDCE(L)925: Flexible Low Power LVCMOS Clock Generator With SSC Support for EMI Reduction datasheet (Rev. I) | PDF | HTML | 2016/10/27 |
Application note | VCXO Application Guideline for CDCE(L)9xx Family (Rev. A) | 2012/04/23 | ||
User guide | CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual (Rev. A) | 2010/11/22 | ||
User guide | CDCE(L)9xx Performance Evaluation Module (Rev. A) | 2010/07/07 | ||
Application note | Troubleshooting I2C Bus Protocol | 2009/10/19 | ||
Application note | Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913 | 2009/09/23 | ||
User guide | CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual | 2008/12/09 | ||
Application note | Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency | 2008/03/31 | ||
Application note | Practical consideration on choosing a crystal for CDCE(L)9xx family | 2008/03/24 | ||
Application note | Clocking Recommendations for DM6446 Digital Video EVM with Sngle PLL (Rev. A) | 2007/08/08 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
CDCE925PERF-EVM — CDCE925 성능 평가 모듈
The CDCE925Perf-Evaluation Module allows the verification of the functionality and performance of CDCE925 and CDCEL925 with the options of crystal and 1.8 V LVCMOS inputs. The outputs can be connected to the Oscilloscope directly with SMA cables.
CDCEL925PERF-EVM — CDCEL925 성능 평가 모듈
The CDCEl925PERF-Evaluation Module will help to verify the functionality and performance of CDCEL925 with the options of crystal and 1.8 V LVCMOS inputs. The outputs can be connected to the Oscilloscope directly with SMA cables. The below information/items can be included: The EVM use's guide: (...)
CDCEL9XXPROGEVM — CDCE(L)949 제품군 EEPROM 프로그래밍 보드
The clock generator CDCE(L)949 family has integrated EEPROM that allows the default frequency settings to be saved upon start up. CDCEL9XXPROGEVM is a programming board that allows a fast programming of prototyping samples or small production quantities. It applies to all 8 devices in the family: (...)
CLOCKPRO — ClockPro Software
TI's ClockPro software allows users to program/configure the following devices in a friendly GUI interface:
- CDCE949
- CDCE937
- CDCE925
- CDCE913
- CDCE906
- CDCE706
- CDCEL949
- CDCEL937
- CDCEL925
- CDCEL913
It is intended to be used with the evaluation modules of the above devices.
지원되는 제품 및 하드웨어
제품
클록 생성기
하드웨어 개발
평가 보드
소프트웨어
소프트웨어 프로그래밍 도구
SCAC073 — TI-Pro-Clock Programming Software
지원되는 제품 및 하드웨어
제품
클록 생성기
CLOCK-TREE-ARCHITECT — 클록 트리 아키텍트 프로그래밍 소프트웨어
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
TSSOP (PW) | 16 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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