DS25BR150
- DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation
- On-Chip 100 Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space
- 7 kV ESD on LVDS I/O Pins Protects Adjoining Components
- Small 3 mm x 3 mm WSON-8 Space Saving Package
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The DS25BR150 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over printed circuit boards and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.
The DS25BR150 is a buffer/repeater with very low power consumption. Other LVDS devices with similar IO characteristics and with signal conditioning features include the following products. The DS25BR110 features four levels of equalization for use as an optimized receiver device, the DS25BR120 features four levels of pre-emphasis for use as an optimized driver device, and the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device.
Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count, and further minimize board space.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | DS25BR150 3.125 Gbps LVDS Buffer datasheet (Rev. E) | 2013. 4. 14 | ||
| 사용 설명서 | 3.125 Gbps LVDS Buffer / Repeater (DS25BR150) Evaluation Kit User Guide | 2012. 1. 25 | |||
| 애플리케이션 노트 | Signal Integrity Eval of Bourns Lightning Protection Solutions w/HS Interfaces | 2010. 1. 8 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| WSON (NGQ) | 8 | Ultra Librarian |
주문 및 품질
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