인터페이스 LVDS, M-LVDS 및 PECL

DS90LV012A

활성

400Mbps LVDS 단일 고속 차동 리시버

제품 상세 정보

Function Receiver Protocols BLVDS, LVDS, LVPECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal BLVDS, LVDS, LVPECL Output signal CMOS Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols BLVDS, LVDS, LVPECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal BLVDS, LVDS, LVPECL Output signal CMOS Rating Catalog Operating temperature range (°C) -40 to 85
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Compatible with ANSI TIA/EIA-644-A Standard
  • >400 Mbps (200 MHz) switching rates
  • 100 ps differential skew (typical)
  • 3.5 ns maximum propagation delay
  • Integrated line termination resistor (102Ω typical)
  • Single 3.3V power supply design (2.7V to 3.6V range)
  • Power down high impedance on LVDS inputs
  • Accepts small swing (350 mV typical) differential signal levels
  • LVDS receiver inputs accept LVDS/BLVDS/LVPECL inputs
  • Supports open, short and terminated input fail-safe
  • Pinout simplifies PCB layout
  • Low Power Dissipation (10mW typical@ 3.3V static)
  • SOT-23 5-lead package
  • Leadless WSON-8 package (3x3 mm body size)
  • Electrically similar to the DS90LV018A
  • Fabricated with advanced CMOS process technology
  • Industrial temperature operating range (−40°C to +85°C)
  • Compatible with ANSI TIA/EIA-644-A Standard
  • >400 Mbps (200 MHz) switching rates
  • 100 ps differential skew (typical)
  • 3.5 ns maximum propagation delay
  • Integrated line termination resistor (102Ω typical)
  • Single 3.3V power supply design (2.7V to 3.6V range)
  • Power down high impedance on LVDS inputs
  • Accepts small swing (350 mV typical) differential signal levels
  • LVDS receiver inputs accept LVDS/BLVDS/LVPECL inputs
  • Supports open, short and terminated input fail-safe
  • Pinout simplifies PCB layout
  • Low Power Dissipation (10mW typical@ 3.3V static)
  • SOT-23 5-lead package
  • Leadless WSON-8 package (3x3 mm body size)
  • Electrically similar to the DS90LV018A
  • Fabricated with advanced CMOS process technology
  • Industrial temperature operating range (−40°C to +85°C)

The DS90LV012A and DS90LT012A are single CMOS differential line receivers designed for applications requiring ultra low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Swing (LVDS) technology

The DS90LV012A and DS90LT012A accept low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receivers also support open, shorted, and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV012A has a pinout designed for easy PCB layout. The DS90LT012A includes an input line termination resistor for point-to-point applications.

The DS90LV012A and DS90LT012A, and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed interface applications.

The DS90LV012A and DS90LT012A are single CMOS differential line receivers designed for applications requiring ultra low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Swing (LVDS) technology

The DS90LV012A and DS90LT012A accept low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receivers also support open, shorted, and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV012A has a pinout designed for easy PCB layout. The DS90LT012A includes an input line termination resistor for point-to-point applications.

The DS90LV012A and DS90LT012A, and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed interface applications.

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기술 자료

star =TI에서 선정한 이 제품의 인기 문서
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8개 모두 보기
유형 직함 날짜
* Data sheet DS90LV012A / DS90LT012A 3-V LVDS Single CMOS Differential Line Receiver datasheet (Rev. E) PDF | HTML 2024/03/01
Application note Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls 2020/10/29
Application note Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 2019/06/29
Application brief LVDS to Improve EMC in Motor Drives 2018/09/27
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018/08/03
Application brief How to Terminate LVDS Connections with DC and AC Coupling 2018/05/16
More literature Die D/S DS90LV012A MDC MWC 3V LVDS Single CMOS Differential Line Receiver 2013/01/08
Application note An Overview of LVDS Technology 1998/10/05

설계 및 개발

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평가 보드

DS90LV011-12AEVM — 단일 채널 LVDS 드라이버 및 리시버 평가 모듈

The DS90LV011-12AEVM is an evaluation module designed for performance and functional evaluation of the Texas Instruments DS90LV011A 3-V LVDS  Differential Line Driver and DS90LV012A 3-V LVDS Differential Line Receiver. With this kit, users can quickly evaluate the output waveform (...)

사용 설명서: PDF
TI.com에서 구매 불가
평가 보드

DSLVDS1001-1002EVM — 단일 채널 LVDS 드라이버 및 리시버 평가 모듈

The DSLVDS1001-1002EVM is an evaluation module designed for performance and functional evaluation of the Texas Instruments DSLVDS1001 3.3-V LVDS  Differential Line Driver and DSLVDS1002 3.3-V LVDS Differential Line Receiver. With this kit, users can quickly evaluate the output waveform (...)
사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

DS90LV012A IBIS Model

SNLM048.ZIP (23 KB) - IBIS Model
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
시뮬레이션 툴

TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
사용 설명서: PDF
패키지 CAD 기호, 풋프린트 및 3D 모델
SOT-23 (DBV) 5 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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