LMK6C
- High-performance differential and single-ended output Oscillator, supporting any fixed frequency within the below range:
- LMK6D: 1MHz to 400MHz, LVDS output
- LMK6H: 1MHz to 400MHz, HCSL output
- LMK6P: 1MHz to 400MHz, LVPECL output
- LMK6C: 1MHz to 200MHz, LVCMOS output
- Ultra-low jitter:
- LMK6D/LMK6H/LMK6P: 100fs typical / 125fs maximum RMS jitter at 156.25MHz (12kHz to 20MHz)
- LMK6C: 350fs typical / 500fs maximum RMS jitter at 100MHz (12kHz to 20MHz)
- LMK6H: PCIe Gen 1 to Gen 6 compliant
- ±25ppm total frequency stability inclusive of 10 years aging and all other factors
- Smallest industry standard DLE and DLF packages
- Support extended industrial temperature grade:
- LMK6P/LMK6D/LMK6H: –40°C to 85°C
- LMK6C: –40°C to 105°C
- Integrated LDO for robust supply noise immunity:
- –72dBc PSRR at 500kHz ripple
- Start-up time: < 5ms
- Standard frequencies:
- LVCMOS (MHz): 1, 2.04, 4, 8.192, 10, 12, 12.288, 16, 19.2, 20, 23.5, 24, 24.57, 25, 25.6, 26, 26.21, 27, 28.12, 32.768, 33.333, 40, 48, 49.15, 50, 54, 60, 65.53, 66, 74.25, 76.8, 80, 100, 108, 125, 133.330 and 156.25
- Differential (MHz): 25, 26, 32.5, 50, 51.84, 54, 65, 76.8, 80, 100, 108, 122.88, 125, 133.330, 148.35, 148.5, 150, 155.52, 156.25, 161.1328125, 200, 312.5, and 400
- Device can support any frequency between 1MHz to 400MHz. Contact TI representative for any frequency and samples needed
Texas Instruments Bulk-Acoustic Wave (BAW) is a micro-resonator technology that enables integration of high-precision BAW resonator directly into packages with ultra-low jitter clock circuitry. BAW is fully designed and manufactured at TI factories like other silicon-based fabrication processes.
The LMK6x device is an ultra-low jitter, fixed-frequency oscillator which incorporates the BAW as the resonator source. The device is factory-programmed per specific operation mode, including frequency, voltage, output type, and function pin. With a high-performance fractional frequency divider, the LMK6x is capable of producing any frequency within the specified range providing a single device family for all frequency needs.
The high-performance clocking, mechanical stability, flexibility, and small package options for this device are designed for reference and core clocks in high-speed SERDES used in telecommunications, data and enterprise network, and industrial applications.
기술 자료
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
VSON (DLE) | 4 | Ultra Librarian |
VSON (DLF) | 4 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.