SCAN921821

활성

프리엠퍼시스, IEEE 1149.1(JTAG), 고속 BIST를 지원하는 듀얼 18비트 시리얼라이저

제품 상세 정보

Protocols Catalog Rating Catalog Operating temperature range (°C) -40 to 85
Protocols Catalog Rating Catalog Operating temperature range (°C) -40 to 85
NFBGA (NZD) 100 100 mm² (10 mm × 10 mm)
  • 15-66 MHz Dual 18:1 Serializer with 2.376 Gbps Total Throughput
  • 8-level Selectable Pre-emphasis on Each Channel Drives Lossy Cables and Backplanes
  • >15kV HBM ESD Protection on Bus LVDS I/O Pins
  • Robust BLVDS Serial Data Transmission with Embedded Clock for Exceptional Noise Immunity and Low EMI
  • Power Saving Control Pin for Each Channel
  • IEEE 1149.1 "JTAG" Compliant
  • At-Speed BIST - PRBS Generation
  • No External Coding Required
  • Internal PLL, No External PLL Components Required
  • Single +3.3V Power Supply
  • Low Power: 260 mW (typ) Per Channel at 66 MHz with PRBS-15 Pattern
  • Single 3.3 V Supply
  • Fabricated with Advanced CMOS Process Technology
  • Industrial −40 to +85°C Temperature Range
  • Compact 100-ball NFBGA Package

All trademarks are the property of their respective owners.

  • 15-66 MHz Dual 18:1 Serializer with 2.376 Gbps Total Throughput
  • 8-level Selectable Pre-emphasis on Each Channel Drives Lossy Cables and Backplanes
  • >15kV HBM ESD Protection on Bus LVDS I/O Pins
  • Robust BLVDS Serial Data Transmission with Embedded Clock for Exceptional Noise Immunity and Low EMI
  • Power Saving Control Pin for Each Channel
  • IEEE 1149.1 "JTAG" Compliant
  • At-Speed BIST - PRBS Generation
  • No External Coding Required
  • Internal PLL, No External PLL Components Required
  • Single +3.3V Power Supply
  • Low Power: 260 mW (typ) Per Channel at 66 MHz with PRBS-15 Pattern
  • Single 3.3 V Supply
  • Fabricated with Advanced CMOS Process Technology
  • Industrial −40 to +85°C Temperature Range
  • Compact 100-ball NFBGA Package

All trademarks are the property of their respective owners.

The SCAN921821 is a dual channel 18-bit serializer featuring signal conditioning, boundary SCAN, and at-speed BIST. Each serializer block transforms an 18-bit parallel LVCMOS/LVTTL data bus into a single Bus LVDS data stream with embedded clock. This single serial data stream with embedded clock simplifies PCB design and reduces PCB cost by narrowing data paths that in turn reduce PCB size and layers. The single serial data stream also reduces cable size, the number of connectors, and eliminates clock-to-data and data-to-data skew.

Each channel also has an 8-level selectable pre-emphasis feature that significantly extends performance over lossy interconnect. Each channel also has its own powerdown pin that saves power by reducing supply current when the channel is not being used.

The SCAN921821 also incorporates advanced testability features including IEEE 1149.1 and at-speed BIST PRBS pattern generation to facilitate verification of board and link integrity

The SCAN921821 is a dual channel 18-bit serializer featuring signal conditioning, boundary SCAN, and at-speed BIST. Each serializer block transforms an 18-bit parallel LVCMOS/LVTTL data bus into a single Bus LVDS data stream with embedded clock. This single serial data stream with embedded clock simplifies PCB design and reduces PCB cost by narrowing data paths that in turn reduce PCB size and layers. The single serial data stream also reduces cable size, the number of connectors, and eliminates clock-to-data and data-to-data skew.

Each channel also has an 8-level selectable pre-emphasis feature that significantly extends performance over lossy interconnect. Each channel also has its own powerdown pin that saves power by reducing supply current when the channel is not being used.

The SCAN921821 also incorporates advanced testability features including IEEE 1149.1 and at-speed BIST PRBS pattern generation to facilitate verification of board and link integrity

다운로드 스크립트와 함께 비디오 보기 비디오

기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
3개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 SCAN921821 Dual 18-Bit Serializer w/Pre-emph, IEEE 1149.1 JTAG & At-Speed BIST datasheet (Rev. C) 2013. 4. 15
애플리케이션 노트 External Serial Interface Reduces Simultaneous Switching Output Noise in FPGAs (Rev. A) 2013. 4. 26
설계 가이드 18-bit SerDes Design Guide (DS92LV18, SCAN921821) 2007. 3. 29

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

시뮬레이션 모델

SCAN921821 IBIS Model

SNLM005.ZIP (11 KB) - IBIS 모델
지원되는 제품 및 하드웨어
패키지 CAD 기호, 풋프린트 및 3D 모델
NFBGA (NZD) 100 Ultra Librarian

주문 및 품질

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상