전력 관리 멀티 채널 IC(PMIC)

TPS53317

활성

DDR 메모리 종단용 낮은 입력 전압, 6A 동기식 스텝다운 SWIFT™ 컨버터

제품 상세 정보

Product type DDR Vin (min) (V) 1 Vin (max) (V) 6 Vout (min) (V) -0.3 Vout (max) (V) 3.6 Features Complete Solution Rating Catalog Operating temperature range (°C) -40 to 85 Iq (typ) (mA) 0.32 DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3
Product type DDR Vin (min) (V) 1 Vin (max) (V) 6 Vout (min) (V) -0.3 Vout (max) (V) 3.6 Features Complete Solution Rating Catalog Operating temperature range (°C) -40 to 85 Iq (typ) (mA) 0.32 DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3
VQFN (RGB) 20 14 mm² (4 mm × 3.5 mm)
  • TI proprietary Integrated MOSFET and Packaging Technology
  • Supports DDR Memory Termination with up to 6-A Continuous Output Source or Sink Current
  • External Tracking
  • Minimum External Components Count
  • to 6-V Conversion Voltage
  • D-CAP+ Mode Architecture
  • Supports All MLCC Output Capacitors and SP/POSCAP
  • Selectable SKIP Mode or Forced CCM
  • Optimized Efficiency at Light and Heavy Loads
  • Selectable 600-kHz or 1-MHz Switching Frequency
  • Selectable Overcurrent Limit (OCL)
  • Overvoltage, Over-Temperature and Hiccup Undervoltage Protection
  • Adjustable Output Voltage from to 2 V
  • 3.5 mm × 4 mm, 20-Pin VQFN Package
  • TI proprietary Integrated MOSFET and Packaging Technology
  • Supports DDR Memory Termination with up to 6-A Continuous Output Source or Sink Current
  • External Tracking
  • Minimum External Components Count
  • to 6-V Conversion Voltage
  • D-CAP+ Mode Architecture
  • Supports All MLCC Output Capacitors and SP/POSCAP
  • Selectable SKIP Mode or Forced CCM
  • Optimized Efficiency at Light and Heavy Loads
  • Selectable 600-kHz or 1-MHz Switching Frequency
  • Selectable Overcurrent Limit (OCL)
  • Overvoltage, Over-Temperature and Hiccup Undervoltage Protection
  • Adjustable Output Voltage from to 2 V
  • 3.5 mm × 4 mm, 20-Pin VQFN Package

The device is a FET-integrated synchronous buck regulator designed mainly for DDR termination. It can provide a regulated output at ½ VDDQ with both sink and source capability. The device employs D-CAP+ mode operation that provides ease of use, low external component count and fast transient response. The device can also be used for other point-of-load (POL) regulation applications requiring up to 6 A. In addition, the device supports full, 6-A, output sinking current capability with tight voltage regulation.

The device features two switching frequency settings (600 kHz and 1 MHz), integrated droop support, external tracking capability, pre-bias startup, output soft discharge, integrated bootstrap switch, power good function, V5IN pin UVLO protection, and supports both ceramic and SP/POSCAP capacitors. It supports input voltages up to 6.0 V, and output voltages adjustable from to 2.0 V.

The device is available in the 3.5 mm × 4 mm, 20-pin, VQFN package (Green RoHs compliant and Pb free) with TI proprietary Integrated MOSFET and packaging technology and is specified from –40°C to 85°C.

For all available packages, see the orderable addendum at the end of the data sheet.

The device is a FET-integrated synchronous buck regulator designed mainly for DDR termination. It can provide a regulated output at ½ VDDQ with both sink and source capability. The device employs D-CAP+ mode operation that provides ease of use, low external component count and fast transient response. The device can also be used for other point-of-load (POL) regulation applications requiring up to 6 A. In addition, the device supports full, 6-A, output sinking current capability with tight voltage regulation.

The device features two switching frequency settings (600 kHz and 1 MHz), integrated droop support, external tracking capability, pre-bias startup, output soft discharge, integrated bootstrap switch, power good function, V5IN pin UVLO protection, and supports both ceramic and SP/POSCAP capacitors. It supports input voltages up to 6.0 V, and output voltages adjustable from to 2.0 V.

The device is available in the 3.5 mm × 4 mm, 20-pin, VQFN package (Green RoHs compliant and Pb free) with TI proprietary Integrated MOSFET and packaging technology and is specified from –40°C to 85°C.

For all available packages, see the orderable addendum at the end of the data sheet.

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기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
3개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 TPS53317 6-A Output, D-CAP+ Mode, Synchronous Step-Down, Integrated-FET Converter for DDR Memory Termination datasheet (Rev. D) PDF | HTML 2015. 7. 10
선택 가이드 SWIFT DC/DC Converters Selector Guide (Rev. G) 2019. 2. 6
선택 가이드 Power Management Guide 2018 (Rev. R) 2018. 6. 25

설계 및 개발

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시뮬레이션 모델

TPS53317 IBIS Model

SLUM347.ZIP (10 KB) - IBIS 모델
지원되는 제품 및 하드웨어
시뮬레이션 모델

TPS53317 PSpice Transient Model

SLUM370.ZIP (64 KB) - PSpice 모델
지원되는 제품 및 하드웨어
패키지 CAD 기호, 풋프린트 및 3D 모델
VQFN (RGB) 20 Ultra Librarian

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지원 및 교육

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