DS40MB200
- 1-Gbps to 4-Gbps Low Jitter Operation
- Fixed Input Equalization
- Programmable Output Pre-Emphasis
- Independent Switch and Line Side Pre-Emphasis Controls
- Programmable Switch-Side Loopback Mode
- On-Chip Terminations
- 3.3-V Supply
- ESD Rating of 6-kV HBM
- 48-leadless WQFN Package (7 mm × 7 mm)
- 0°C to +85°C Operating Temperature Range
The DS40MB200 device is a dual signal conditioning 2:1 multiplexer (MUX) and 1:2 fan-out buffer designed for use in backplane-redundancy applications. Signal conditioning features include continuous time linear equalization (CTLE) and programmable output pre-emphasis, extending data communication in FR4 backplanes at rates up to 4 Gbps. Each input stage has a fixed equalizer to reduce intersymbol interference distortion from board traces.
All output drivers have four selectable steps of pre-emphasis to compensate for transmission losses from long FR4 backplanes and reduce deterministic jitter. The pre-emphasis levels can be independently controlled for the line-side and switch-side drivers. The internal loopback paths from switch-side input to switch-side output enable at-speed system testing. All receiver inputs are internally terminated with 100-Ω differential terminating resistors. All drivers are internally terminated with 50 Ω to VCC.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS40MB200 Dual 4-Gbps 2:1/1:2 CML MUX/Buffer With Transmit Pre-Emphasis and Receive Equalization datasheet (Rev. K) | PDF | HTML | 2024/3/1 | ||
| 應用說明 | Setting Pre-Empha Level for DS40MB200 Dual 4Gb/s Mux/Buffer (Rev. C) | 2013/4/26 | ||||
| 應用說明 | AN-1398 Printed Circuit Board Design Techniques for DS40MB200 (Rev. A) | 2013/4/26 | ||||
| 應用說明 | Enabling Redundancy in Multi-Gigabit Links w/DS40MB200 Mux/Buffer (Rev. A) | 2013/4/26 | ||||
| 應用說明 | Driving Signals Over XAUI Backplanes Using DS42MB100, DS40MB200, or DS42BR400 (Rev. B) | 2013/4/26 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (NJU) | 48 | Ultra Librarian |