DS91M047
- DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
- Conforms to TIA/EIA-899 M-LVDS Standard
- Controlled Transition Times (2 ns typ) Minimize Reflections
- 8 kV ESD on M-LVDS Pins Protects Adjoining Components
- Flow-Through Pinout Simplifies PCB Layout
- Industrial Operating Temperature Range (−40°C to +85°C)
- Available in a Space Saving SOIC-16 Package
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The DS91M047 is a high-speed quad M-LVDS line driver designed for driving clock or data signals to up to four multipoint networks.
M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs.
The DS91M047 accepts LVTTL/LVCMOS input levels and translates them to M-LVDS signal levels with transition times of greater than 1 ns. The device provides the DE and DE inputs that are ANDed together and control the TRI-STATE outputs. The DE and DE inputs are common to all four drivers.
The DS91M047 has a flow-through pinout for easy PCB layout. The DS91M047 provides a new alternative for high speed multipoint interface applications. It is packaged in a space saving SOIC-16 package.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS91M047 125 MHz Quad M-LVDS Line Driver datasheet (Rev. E) | 2013/4/16 | |||
| Application brief | How Far, How Fast Can You Operate MLVDS? | 2018/8/6 | ||||
| 應用說明 | Introduction to M-LVDS (TIA/EIA-899) (Rev. A) | 2013/1/3 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |