DS91M047

現行

125-MHz 四 M-LVDS 線路驅動器

產品詳細資料

Function Driver Protocols M-LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (MBits) 250 Input signal LVCMOS, LVTTL Output signal M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver Protocols M-LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (MBits) 250 Input signal LVCMOS, LVTTL Output signal M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6
  • DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
  • Conforms to TIA/EIA-899 M-LVDS Standard
  • Controlled Transition Times (2 ns typ) Minimize Reflections
  • 8 kV ESD on M-LVDS Pins Protects Adjoining Components
  • Flow-Through Pinout Simplifies PCB Layout
  • Industrial Operating Temperature Range (−40°C to +85°C)
  • Available in a Space Saving SOIC-16 Package

All trademarks are the property of their respective owners.

  • DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
  • Conforms to TIA/EIA-899 M-LVDS Standard
  • Controlled Transition Times (2 ns typ) Minimize Reflections
  • 8 kV ESD on M-LVDS Pins Protects Adjoining Components
  • Flow-Through Pinout Simplifies PCB Layout
  • Industrial Operating Temperature Range (−40°C to +85°C)
  • Available in a Space Saving SOIC-16 Package

All trademarks are the property of their respective owners.

The DS91M047 is a high-speed quad M-LVDS line driver designed for driving clock or data signals to up to four multipoint networks.

M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs.

The DS91M047 accepts LVTTL/LVCMOS input levels and translates them to M-LVDS signal levels with transition times of greater than 1 ns. The device provides the DE and DE inputs that are ANDed together and control the TRI-STATE outputs. The DE and DE inputs are common to all four drivers.

The DS91M047 has a flow-through pinout for easy PCB layout. The DS91M047 provides a new alternative for high speed multipoint interface applications. It is packaged in a space saving SOIC-16 package.

The DS91M047 is a high-speed quad M-LVDS line driver designed for driving clock or data signals to up to four multipoint networks.

M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs.

The DS91M047 accepts LVTTL/LVCMOS input levels and translates them to M-LVDS signal levels with transition times of greater than 1 ns. The device provides the DE and DE inputs that are ANDed together and control the TRI-STATE outputs. The DE and DE inputs are common to all four drivers.

The DS91M047 has a flow-through pinout for easy PCB layout. The DS91M047 provides a new alternative for high speed multipoint interface applications. It is packaged in a space saving SOIC-16 package.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 4
類型 標題 日期
* Data sheet DS91M047 125 MHz Quad M-LVDS Line Driver datasheet (Rev. E) 2013年 4月 16日
Application brief How Far, How Fast Can You Operate MLVDS? 2018年 8月 6日
Application note Introduction to M-LVDS (TIA/EIA-899) (Rev. A) 2013年 1月 3日
EVM User's guide 125 MHz Quad M-LVDS Driver Evaluation Board 2012年 1月 26日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 引腳 下載
SOIC (D) 16 檢視選項

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片