產品詳細資料

DSP type 1 C64x+ DSP (max) (MHz) 700 CPU 32-/64-bit Operating system DSP/BIOS Ethernet MAC 10/100 Rating HiRel Enhanced Product Operating temperature range (°C) -40 to 125
DSP type 1 C64x+ DSP (max) (MHz) 700 CPU 32-/64-bit Operating system DSP/BIOS Ethernet MAC 10/100 Rating HiRel Enhanced Product Operating temperature range (°C) -40 to 125
PBGA (GDU) 376 529 mm² 23 x 23
  • High-Performance Digital Signal Processor (C6424)
    • 2.5-, 2-, 1.67-, 1.43-ns Instruction Cycle Time
    • 400-, 500-, 600-, 700-MHz C64x+™ Clock Rate
    • Eight 32-Bit C64x+ Instructions/Cycle
    • 3200, 4000, 4800, 5600 MIPS
    • Fully Software-Compatible With C64x
    • Commercial and Automotive (Q or S suffix) Grades
    • Low-Power Device (L suffix)
  • VelociTI.2™ Extensions to VelociTI™ Advanced
    Very-Long-Instruction-Word (VLIW) SM320C64x+™ DSP Core
    • Eight Highly Independent Functional Units
      With VelociTI.2 Extensions:
      • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit,
        Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 & times 16-Bit Multiplies
        (32-Bit Results) per Clock Cycle or Eight 8 × 8-Bit
        Multiplies (16-Bit Results) per Clock Cycle
    • Load-Store Architecture With Non-Aligned Support
    • 64 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
    • Additional C64x+™ Enhancements
      • Protected Mode Operation
      • Exceptions Support for Error Detection
        and Program Redirection
      • Hardware Support for Modulo Loop
        Auto-Focus Module Operation
  • C64x+ Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • VelociTI.2 Increased Orthogonality
    • C64x+ Extensions
      • Compact 16-bit Instructions
      • Additional Instructions to Support Complex Multiplies
  • C64x+ L1/L2 Memory Architecture
    • 256K-Bit (32K-Byte) L1P Program
      RAM/Cache [Flexible Allocation]
    • 640K-Bit (80K-Byte) L1D Data RAM/Cache
      [Flexible Allocation]
    • 1M-Bit (128K-Byte) L2 Unified Mapped
      RAM/Cache [Flexible Allocation]
  • Endianess: Supports Both Little Endian and Big Endian
  • External Memory Interfaces (EMIFs)
    • 32-Bit DDR2 SDRAM Memory Controller
      With 256M-Byte Address Space (1.8-V I/O)
      • Supports up to 333-MHz (data rate) bus
        and interfaces to DDR2-400 SDRAM
    • Asynchronous 16-Bit Wide EMIF (EMIFA)
      With up to 128M-Byte Address Reach
      • Flash Memory Interfaces
        • NOR (8-/16-Bit-Wide Data)
        • NAND (8-/16-Bit-Wide Data)
  • Enhanced Direct-Memory-Access (EDMA)
    Controller (64 Independent Channels)
  • Two 64-Bit General-Purpose Timers (Each
    Configurable as Two 32-Bit Timers)
  • One 64-Bit Watch Dog Timer
  • Two UARTs (One with RTS and CTS Flow Control)
  • Master/Slave Inter-Integrated Circuit (I2C Bus™)
  • Two Multichannel Buffered Serial Ports (McBSPs)
    • I2S and TDM
    • AC97 Audio Codec Interface
    • SPI
    • Standard Voice Codec Interface (AIC12)
    • Telecom Interfaces – ST-Bus, H-100
    • 128 Channel Mode
  • Multichannel Audio Serial Port (McASP0)
    • Four Serializers and SPDIF (DIT) Mode
  • 16-Bit Host-Port Interface (HPI)
  • 32-Bit 33-MHz, 3.3-V Peripheral Component
    Interconnect (PCI) Master/Slave Interface
  • 10/100 Mb/s Ethernet MAC (EMAC)
    • IEEE 802.3 Compliant
    • Supports Multiple Media Independent Interfaces
      (MII, RMII)
    • Management Data Input/Output (MDIO) Module
  • VLYNQ™ Interface (FPGA Interface)
  • Three Pulse Width Modulator (PWM) Outputs
  • On-Chip ROM Bootloader
  • Individual Power-Savings Modes
  • Flexible PLL Clock Generators
  • IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
  • Up to 111 General-Purpose I/O (GPIO) Pins
    (Multiplexed With Other Device Functions)
  • Packages:
    • 376-Pin Plastic BGA Package, 1.0-mm Ball Pitch
  • 0.09-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V and 1.8-V I/O, 1.2-V Internal
    (-7/-6/-5/-4/Q6/-Q5/-Q4)
  • 3.3-V and 1.8-V I/O, 1.05-V Internal
    (-7/-6/-5/-4/-L/-Q5)
  • Applications:
    • Telecom
    • Audio
    • Industrial Applications
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

All trademarks are the property of their respective owners.

  • High-Performance Digital Signal Processor (C6424)
    • 2.5-, 2-, 1.67-, 1.43-ns Instruction Cycle Time
    • 400-, 500-, 600-, 700-MHz C64x+™ Clock Rate
    • Eight 32-Bit C64x+ Instructions/Cycle
    • 3200, 4000, 4800, 5600 MIPS
    • Fully Software-Compatible With C64x
    • Commercial and Automotive (Q or S suffix) Grades
    • Low-Power Device (L suffix)
  • VelociTI.2™ Extensions to VelociTI™ Advanced
    Very-Long-Instruction-Word (VLIW) SM320C64x+™ DSP Core
    • Eight Highly Independent Functional Units
      With VelociTI.2 Extensions:
      • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit,
        Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 & times 16-Bit Multiplies
        (32-Bit Results) per Clock Cycle or Eight 8 × 8-Bit
        Multiplies (16-Bit Results) per Clock Cycle
    • Load-Store Architecture With Non-Aligned Support
    • 64 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
    • Additional C64x+™ Enhancements
      • Protected Mode Operation
      • Exceptions Support for Error Detection
        and Program Redirection
      • Hardware Support for Modulo Loop
        Auto-Focus Module Operation
  • C64x+ Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • VelociTI.2 Increased Orthogonality
    • C64x+ Extensions
      • Compact 16-bit Instructions
      • Additional Instructions to Support Complex Multiplies
  • C64x+ L1/L2 Memory Architecture
    • 256K-Bit (32K-Byte) L1P Program
      RAM/Cache [Flexible Allocation]
    • 640K-Bit (80K-Byte) L1D Data RAM/Cache
      [Flexible Allocation]
    • 1M-Bit (128K-Byte) L2 Unified Mapped
      RAM/Cache [Flexible Allocation]
  • Endianess: Supports Both Little Endian and Big Endian
  • External Memory Interfaces (EMIFs)
    • 32-Bit DDR2 SDRAM Memory Controller
      With 256M-Byte Address Space (1.8-V I/O)
      • Supports up to 333-MHz (data rate) bus
        and interfaces to DDR2-400 SDRAM
    • Asynchronous 16-Bit Wide EMIF (EMIFA)
      With up to 128M-Byte Address Reach
      • Flash Memory Interfaces
        • NOR (8-/16-Bit-Wide Data)
        • NAND (8-/16-Bit-Wide Data)
  • Enhanced Direct-Memory-Access (EDMA)
    Controller (64 Independent Channels)
  • Two 64-Bit General-Purpose Timers (Each
    Configurable as Two 32-Bit Timers)
  • One 64-Bit Watch Dog Timer
  • Two UARTs (One with RTS and CTS Flow Control)
  • Master/Slave Inter-Integrated Circuit (I2C Bus™)
  • Two Multichannel Buffered Serial Ports (McBSPs)
    • I2S and TDM
    • AC97 Audio Codec Interface
    • SPI
    • Standard Voice Codec Interface (AIC12)
    • Telecom Interfaces – ST-Bus, H-100
    • 128 Channel Mode
  • Multichannel Audio Serial Port (McASP0)
    • Four Serializers and SPDIF (DIT) Mode
  • 16-Bit Host-Port Interface (HPI)
  • 32-Bit 33-MHz, 3.3-V Peripheral Component
    Interconnect (PCI) Master/Slave Interface
  • 10/100 Mb/s Ethernet MAC (EMAC)
    • IEEE 802.3 Compliant
    • Supports Multiple Media Independent Interfaces
      (MII, RMII)
    • Management Data Input/Output (MDIO) Module
  • VLYNQ™ Interface (FPGA Interface)
  • Three Pulse Width Modulator (PWM) Outputs
  • On-Chip ROM Bootloader
  • Individual Power-Savings Modes
  • Flexible PLL Clock Generators
  • IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
  • Up to 111 General-Purpose I/O (GPIO) Pins
    (Multiplexed With Other Device Functions)
  • Packages:
    • 376-Pin Plastic BGA Package, 1.0-mm Ball Pitch
  • 0.09-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V and 1.8-V I/O, 1.2-V Internal
    (-7/-6/-5/-4/Q6/-Q5/-Q4)
  • 3.3-V and 1.8-V I/O, 1.05-V Internal
    (-7/-6/-5/-4/-L/-Q5)
  • Applications:
    • Telecom
    • Audio
    • Industrial Applications
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

All trademarks are the property of their respective owners.

The 320C64x+™ DSPs (including the SMS320C6424 device) are the highest-performance fixed-point DSP generation in the 320C6000™ DSP platform. The C6424 device is based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for digital signal processor applications. The C64x+™ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform. The C64x™ DSPs support added functionality and have an expanded instruction set from previous devices.

Any reference to the C64x DSP or C64x CPU also applies, unless otherwise noted, to the C64x+ DSP and C64x+ CPU, respectively.

With performance of up to 5600 million instructions per second (MIPS) at a clock rate of 700 MHz, the C64x+ core offers solutions to high-performance DSP programming challenges. The DSP core possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x+ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units—two multipliers for a 32-bit result and six arithmetic logic units (ALUs). The eight functional units include instructions to accelerate the performance in telecom, audio, and industrial applications. The DSP core can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2800 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 5600 MMACS. For more details on the C64x+ DSP, see the TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732).

The C6424 also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000 DSP platform devices. The C6424 core uses a two-level cache-based architecture. The Level 1 program memory/cache (L1P) consists of a 256K-bit memory space that can be configured as mapped memory or direct mapped cache, and the Level 1 data (L1D) consists of a 640K-bit memory space —384K-bit of which is mapped memory and 256K-bit of which can be configured as mapped memory or 2-way set-associative cache. The Level 2 memory/cache (L2) consists of a 1M-bit memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two.

The peripheral set includes: a 10/100 Mb/s Ethernet MAC (EMAC) with a management data input/output (MDIO) module; a 4-bit transmit, 4-bit receive VLYNQ interface; an inter-integrated circuit (I2C) Bus interface; two multichannel buffered serial ports (McBSPs); a multichannel audio serial port (McASP0) with 4 serializers; 2 64-bit general-purpose timers each configurable as 2 independent 32-bit timers; 1 64-bit watchdog timer; a user-configurable 16-bit host-port interface (HPI); up to 111-pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals; 2 UARTs with hardware handshaking support on 1 UART; 3 pulse width modulator (PWM) peripherals; 1 peripheral component interconnect (PCI) [33 MHz]; and 2 glueless external memory interfaces: an asynchronous external memory interface (EMIFA) for slower memories/peripherals, and a higher speed synchronous memory interface for DDR2.

The Ethernet Media Access Controller (EMAC) provides an efficient interface between the C6424 and the network. The C6424 EMAC supports 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) and 100 Mbps in either half- or full-duplex mode, with hardware flow control and quality of service (QOS) support.

The Management Data Input/Output (MDIO) module continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system.

The I2C and VLYNQ ports allow C6424 to easily control peripheral devices and/or communicate with host processors.

The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections later in this document and the associated peripheral reference guides.

The C6424 has a complete set of development tools. These include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

The 320C64x+™ DSPs (including the SMS320C6424 device) are the highest-performance fixed-point DSP generation in the 320C6000™ DSP platform. The C6424 device is based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for digital signal processor applications. The C64x+™ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform. The C64x™ DSPs support added functionality and have an expanded instruction set from previous devices.

Any reference to the C64x DSP or C64x CPU also applies, unless otherwise noted, to the C64x+ DSP and C64x+ CPU, respectively.

With performance of up to 5600 million instructions per second (MIPS) at a clock rate of 700 MHz, the C64x+ core offers solutions to high-performance DSP programming challenges. The DSP core possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x+ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units—two multipliers for a 32-bit result and six arithmetic logic units (ALUs). The eight functional units include instructions to accelerate the performance in telecom, audio, and industrial applications. The DSP core can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2800 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 5600 MMACS. For more details on the C64x+ DSP, see the TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732).

The C6424 also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000 DSP platform devices. The C6424 core uses a two-level cache-based architecture. The Level 1 program memory/cache (L1P) consists of a 256K-bit memory space that can be configured as mapped memory or direct mapped cache, and the Level 1 data (L1D) consists of a 640K-bit memory space —384K-bit of which is mapped memory and 256K-bit of which can be configured as mapped memory or 2-way set-associative cache. The Level 2 memory/cache (L2) consists of a 1M-bit memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two.

The peripheral set includes: a 10/100 Mb/s Ethernet MAC (EMAC) with a management data input/output (MDIO) module; a 4-bit transmit, 4-bit receive VLYNQ interface; an inter-integrated circuit (I2C) Bus interface; two multichannel buffered serial ports (McBSPs); a multichannel audio serial port (McASP0) with 4 serializers; 2 64-bit general-purpose timers each configurable as 2 independent 32-bit timers; 1 64-bit watchdog timer; a user-configurable 16-bit host-port interface (HPI); up to 111-pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals; 2 UARTs with hardware handshaking support on 1 UART; 3 pulse width modulator (PWM) peripherals; 1 peripheral component interconnect (PCI) [33 MHz]; and 2 glueless external memory interfaces: an asynchronous external memory interface (EMIFA) for slower memories/peripherals, and a higher speed synchronous memory interface for DDR2.

The Ethernet Media Access Controller (EMAC) provides an efficient interface between the C6424 and the network. The C6424 EMAC supports 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) and 100 Mbps in either half- or full-duplex mode, with hardware flow control and quality of service (QOS) support.

The Management Data Input/Output (MDIO) module continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system.

The I2C and VLYNQ ports allow C6424 to easily control peripheral devices and/or communicate with host processors.

The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections later in this document and the associated peripheral reference guides.

The C6424 has a complete set of development tools. These include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 4
類型 標題 日期
* Data sheet Fixed-Point Digital Signal Processor datasheet 2009年 6月 8日
* VID SM320C6424-EP VID V6209629 2016年 6月 21日
* Radiation & reliability report SM320C6424GDUQ6EP Reliability Report 2013年 3月 22日
Application note Introduction to TMS320C6000 DSP Optimization 2011年 10月 6日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

偵錯探測器

TMDSEMU200-U — XDS200 USB 偵錯探測器

XDS200 是為 TI 嵌入式裝置偵錯的偵錯探測器 (模擬器)。與低成本 XDS110 和高效能 XDS560v2 相比,XDS200 是兼具低成本與優異效能的完美平衡,可在單一 pod 中支援各種標準 (IEEE1149.1、IEEE1149.7、SWD)。所有 XDS 偵錯探測器均支援具嵌入式追踪緩衝區 (ETB) 的 Arm® 與 DSP 處理器中的核心和系統追蹤功能。透過針腳進行核心追蹤則需要 XDS560v2 PRO TRACE

XDS200 透過 TI 20 針腳連接器 (配備適用 TI 14 針腳、Arm Cortex® 10 針腳和 Arm 20 針腳的多重轉接器) (...)

TI.com 無法提供
偵錯探測器

TMDSEMU560V2STM-U — XDS560v2 System Trace USB 偵錯探測器

XDS560v2 是 XDS560™ 偵錯探測器系列的最高性能表現,支援傳統 JTAG 標準 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。請注意,序列線偵錯 (SWD) 不受支援。

所有 XDS 偵錯探測器均支援所有具有嵌入式追踪緩衝區 (ETB) 的 ARM 和 DSP 處理器中的核心和系統追蹤功能。對於針腳追蹤則需要 XDS560v2 PRO TRACE

XDS560v2 透過 MIPI HSPT 60 針腳接頭 (具有用於 TI 14 針腳、TI 20 針腳和 ARM 20 針腳的多轉接器) 連接到目標電路板,並透過 USB2.0 高速 (480Mbps) (...)

TI.com 無法提供
偵錯探測器

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB 與乙太網路偵錯探測器

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

TI.com 無法提供
驅動程式或資料庫

AEC-AER Acoustic echo cancellation/removal for TI C64x+, C674x, C55x and Cortex®-A8 processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

支援產品和硬體

支援產品和硬體

產品
Arm 式處理器
66AK2G12 高效能多核心 DSP+Arm - 1x Arm A15 核心、1x C66x DSP 核心
數位訊號處理器 (DSP)
DM505 適用視覺分析 15mm 封裝的 SoC SM320C6424-EP 強化型產品 C6424 定點 DSP SM320C6472-HIREL 高可靠性產品 6 核心 C6472 定點 DSP SM320C6678-HIREL 高可靠性產品高效能 8 核心 C6678 定點和浮點 DSP SM320C6701 軍用應用的單核 C67x 浮點 DSP - 高達 167MHz SM320C6701-EP 增強型產品 C6701 浮點 DSP SMJ320C6203 軍用級 C62x 定點 DSP - 陶瓷封裝 SMJ320C6701 軍用級 C67x 浮點 DSP - 陶瓷封裝 SMJ320C6701-SP 航太級 C6701 浮點 DSP - 具陶瓷封裝的抗輻射 V 類 SMV320C6727B-SP 航太級 C6727B 浮點 DSP - 具陶瓷封裝的抗輻射 V 類 TMS320C5517 低功耗 C55x 定點 DSP - 高達 200MHz、USB、LCD 介面、FFT HWA、SAR ADC TMS320C5532 低功耗 C55x 定點 DSP - 高達 100MHz TMS320C5533 低功耗 C55x 定點 DSP - 高達 100MHz、USB TMS320C5534 低功耗 C55x 定點 DSP - 高達 100MHz、USB、LCD 介面 TMS320C5535 低功耗 C55x 定點 DSP - 高達 100MHz、USB、LCD 介面、FFT HWA、SAR ADC TMS320C6202B C62x 定點 DSP - 高達 300MHz、384KB TMS320C6203B C62x 定點 DSP - 高達 300MHz、896KB TMS320C6211B C62x 定點 DSP - 高達 167MHz TMS320C6421Q C64x+ 定點 DSP - 最高 600MHz、8 位元 EMIFA、16 位元 DDR2 TMS320C6424Q C64x+ 定點 DSP - 最高 600MHz、16/8 位元 EMIFA、32/16 位元 DDR2 TMS320C6454 C64x+ 定點 DSP - 高達 1GHz、64 位元 EMIFA、32/16 位元 DDR2、1 Gbps 乙太網路 TMS320C6457 通訊基礎設施數位訊號處理器 TMS320C6701 C67x 浮點 DSP - 高達 167MHz、McBSP TMS320C6711D C67x 浮點 DSP - 高達 250MHz、McBSP、32 位元 EMIFA TMS320C6712D C67x 浮點 DSP - 高達 150MHz、McBSP、16 位元 EMIFA TMS320C6720 C67x 浮點 DSP - 200MHz、McASP、16 位元 EMIFA TMS320C6722B C67x 浮點 DSP - 高達 250MHz、McASP、16 位元 EMIFA TMS320C6726B C67x 浮點 DSP - 高達 266MHz、McASP、16 位元 EMIFA TMS320C6727 C67x 浮點 DSP - 高達 250MHz、McASP、32 位元 EMIFA TMS320C6727B C67x 浮點 DSP - 高達 350MHz、McASP、32 位元 EMIFA TMS320C6743 低功耗 C674x 浮點 DSP- 375MHz TMS320C6745 低功耗 C674x 浮點 DSP- 456MHz,QFP TMS320C6747 低功耗 C674x 浮點 DSP- 456MHz,PBGA TMS320DM642Q 視訊/成像定點數位訊號處理器 TMS320DM6431Q 數位媒體處理器,高達 2400 MIPS、300 MHz 時脈速率 TMS320DM6435Q 數位媒體處理器,最高達 4800 MIPS、600 MHz 時脈速率、1 McASP、1 McBSP TMS320DM6437Q 數位媒體處理器,最高達 4800MIPS、600 MHz 時鐘速率、1 McASP、2 McBSP TMS320DM6441 DaVinci 數位媒體晶片系統 TMS320DM6467T 數位媒體晶片系統 TMS320DM647 數位媒體處理器
下載選項
驅動程式或資料庫

C64X-DSPLIB Download TMS320C64x DSP Library

TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)

支援產品和硬體

支援產品和硬體

產品
Arm 式處理器
OMAPL137-HT 高溫低功耗 C674x 浮點 DSP + Arm 處理器 - 高達 456 MHz OMAPL138B-EP 強化產品低功耗 C674x 浮點 DSP + Arm9 處理器 -345 MHz TMS320DM8127 DaVinci 數位媒體處理器
數位訊號處理器 (DSP)
SM320C6424-EP 強化型產品 C6424 定點 DSP SM320C6472-HIREL 高可靠性產品 6 核心 C6472 定點 DSP SM320C6678-HIREL 高可靠性產品高效能 8 核心 C6678 定點和浮點 DSP SM320C6701 軍用應用的單核 C67x 浮點 DSP - 高達 167MHz SM320C6701-EP 增強型產品 C6701 浮點 DSP SMJ320C6203 軍用級 C62x 定點 DSP - 陶瓷封裝 SMJ320C6701 軍用級 C67x 浮點 DSP - 陶瓷封裝 SMJ320C6701-SP 航太級 C6701 浮點 DSP - 具陶瓷封裝的抗輻射 V 類 SMV320C6727B-SP 航太級 C6727B 浮點 DSP - 具陶瓷封裝的抗輻射 V 類 TMS320C6202B C62x 定點 DSP - 高達 300MHz、384KB TMS320C6203B C62x 定點 DSP - 高達 300MHz、896KB TMS320C6211B C62x 定點 DSP - 高達 167MHz TMS320C6421Q C64x+ 定點 DSP - 最高 600MHz、8 位元 EMIFA、16 位元 DDR2 TMS320C6424Q C64x+ 定點 DSP - 最高 600MHz、16/8 位元 EMIFA、32/16 位元 DDR2 TMS320C6452 C64x+ 定點 DSP - 高達 900MHz、1Gbps 乙太網路 TMS320C6454 C64x+ 定點 DSP - 高達 1GHz、64 位元 EMIFA、32/16 位元 DDR2、1 Gbps 乙太網路 TMS320C6455 C64x+ 定點 DSP 最高 1.2GHz、64 位元 EMIFA、32 與 16 位元 DDR2、1Gbps 乙太網路 TMS320C6457 通訊基礎設施數位訊號處理器 TMS320C6701 C67x 浮點 DSP - 高達 167MHz、McBSP TMS320C6711D C67x 浮點 DSP - 高達 250MHz、McBSP、32 位元 EMIFA TMS320C6712D C67x 浮點 DSP - 高達 150MHz、McBSP、16 位元 EMIFA TMS320C6720 C67x 浮點 DSP - 200MHz、McASP、16 位元 EMIFA TMS320C6722B C67x 浮點 DSP - 高達 250MHz、McASP、16 位元 EMIFA TMS320C6726B C67x 浮點 DSP - 高達 266MHz、McASP、16 位元 EMIFA TMS320C6727 C67x 浮點 DSP - 高達 250MHz、McASP、32 位元 EMIFA TMS320C6727B C67x 浮點 DSP - 高達 350MHz、McASP、32 位元 EMIFA TMS320C6743 低功耗 C674x 浮點 DSP- 375MHz TMS320C6745 低功耗 C674x 浮點 DSP- 456MHz,QFP TMS320C6747 低功耗 C674x 浮點 DSP- 456MHz,PBGA
驅動程式或資料庫

C67X-DSPLIB Download TMS320C67x DSP Library

TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)

支援產品和硬體

支援產品和硬體

產品
Arm 式處理器
OMAPL137-HT 高溫低功耗 C674x 浮點 DSP + Arm 處理器 - 高達 456 MHz OMAPL138B-EP 強化產品低功耗 C674x 浮點 DSP + Arm9 處理器 -345 MHz TMS320DM8127 DaVinci 數位媒體處理器
數位訊號處理器 (DSP)
SM320C6424-EP 強化型產品 C6424 定點 DSP SM320C6472-HIREL 高可靠性產品 6 核心 C6472 定點 DSP SM320C6678-HIREL 高可靠性產品高效能 8 核心 C6678 定點和浮點 DSP SM320C6701 軍用應用的單核 C67x 浮點 DSP - 高達 167MHz SM320C6701-EP 增強型產品 C6701 浮點 DSP SMJ320C6203 軍用級 C62x 定點 DSP - 陶瓷封裝 SMJ320C6701 軍用級 C67x 浮點 DSP - 陶瓷封裝 SMJ320C6701-SP 航太級 C6701 浮點 DSP - 具陶瓷封裝的抗輻射 V 類 SMV320C6727B-SP 航太級 C6727B 浮點 DSP - 具陶瓷封裝的抗輻射 V 類 TMS320C6202B C62x 定點 DSP - 高達 300MHz、384KB TMS320C6203B C62x 定點 DSP - 高達 300MHz、896KB TMS320C6211B C62x 定點 DSP - 高達 167MHz TMS320C6421Q C64x+ 定點 DSP - 最高 600MHz、8 位元 EMIFA、16 位元 DDR2 TMS320C6424Q C64x+ 定點 DSP - 最高 600MHz、16/8 位元 EMIFA、32/16 位元 DDR2 TMS320C6452 C64x+ 定點 DSP - 高達 900MHz、1Gbps 乙太網路 TMS320C6454 C64x+ 定點 DSP - 高達 1GHz、64 位元 EMIFA、32/16 位元 DDR2、1 Gbps 乙太網路 TMS320C6455 C64x+ 定點 DSP 最高 1.2GHz、64 位元 EMIFA、32 與 16 位元 DDR2、1Gbps 乙太網路 TMS320C6457 通訊基礎設施數位訊號處理器 TMS320C6701 C67x 浮點 DSP - 高達 167MHz、McBSP TMS320C6711D C67x 浮點 DSP - 高達 250MHz、McBSP、32 位元 EMIFA TMS320C6712D C67x 浮點 DSP - 高達 150MHz、McBSP、16 位元 EMIFA TMS320C6720 C67x 浮點 DSP - 200MHz、McASP、16 位元 EMIFA TMS320C6722B C67x 浮點 DSP - 高達 250MHz、McASP、16 位元 EMIFA TMS320C6726B C67x 浮點 DSP - 高達 266MHz、McASP、16 位元 EMIFA TMS320C6727 C67x 浮點 DSP - 高達 250MHz、McASP、32 位元 EMIFA TMS320C6727B C67x 浮點 DSP - 高達 350MHz、McASP、32 位元 EMIFA TMS320C6743 低功耗 C674x 浮點 DSP- 375MHz TMS320C6745 低功耗 C674x 浮點 DSP- 456MHz,QFP TMS320C6747 低功耗 C674x 浮點 DSP- 456MHz,PBGA
驅動程式或資料庫

FAXLIB FAX library (FAXLIB) for C66x, C64x+ and C55x processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

支援產品和硬體

支援產品和硬體

產品
Arm 式處理器
66AK2G12 高效能多核心 DSP+Arm - 1x Arm A15 核心、1x C66x DSP 核心
數位訊號處理器 (DSP)
DM505 適用視覺分析 15mm 封裝的 SoC SM320C6424-EP 強化型產品 C6424 定點 DSP SM320C6472-HIREL 高可靠性產品 6 核心 C6472 定點 DSP SM320C6678-HIREL 高可靠性產品高效能 8 核心 C6678 定點和浮點 DSP SM320C6701 軍用應用的單核 C67x 浮點 DSP - 高達 167MHz SM320C6701-EP 增強型產品 C6701 浮點 DSP SMJ320C6203 軍用級 C62x 定點 DSP - 陶瓷封裝 SMJ320C6701 軍用級 C67x 浮點 DSP - 陶瓷封裝 SMJ320C6701-SP 航太級 C6701 浮點 DSP - 具陶瓷封裝的抗輻射 V 類 SMV320C6727B-SP 航太級 C6727B 浮點 DSP - 具陶瓷封裝的抗輻射 V 類 TMS320C5517 低功耗 C55x 定點 DSP - 高達 200MHz、USB、LCD 介面、FFT HWA、SAR ADC TMS320C5532 低功耗 C55x 定點 DSP - 高達 100MHz TMS320C5533 低功耗 C55x 定點 DSP - 高達 100MHz、USB TMS320C5534 低功耗 C55x 定點 DSP - 高達 100MHz、USB、LCD 介面 TMS320C5535 低功耗 C55x 定點 DSP - 高達 100MHz、USB、LCD 介面、FFT HWA、SAR ADC TMS320C6202B C62x 定點 DSP - 高達 300MHz、384KB TMS320C6203B C62x 定點 DSP - 高達 300MHz、896KB TMS320C6211B C62x 定點 DSP - 高達 167MHz TMS320C6421Q C64x+ 定點 DSP - 最高 600MHz、8 位元 EMIFA、16 位元 DDR2 TMS320C6424Q C64x+ 定點 DSP - 最高 600MHz、16/8 位元 EMIFA、32/16 位元 DDR2 TMS320C6454 C64x+ 定點 DSP - 高達 1GHz、64 位元 EMIFA、32/16 位元 DDR2、1 Gbps 乙太網路 TMS320C6457 通訊基礎設施數位訊號處理器 TMS320C6701 C67x 浮點 DSP - 高達 167MHz、McBSP TMS320C6711D C67x 浮點 DSP - 高達 250MHz、McBSP、32 位元 EMIFA TMS320C6712D C67x 浮點 DSP - 高達 150MHz、McBSP、16 位元 EMIFA TMS320C6720 C67x 浮點 DSP - 200MHz、McASP、16 位元 EMIFA TMS320C6722B C67x 浮點 DSP - 高達 250MHz、McASP、16 位元 EMIFA TMS320C6726B C67x 浮點 DSP - 高達 266MHz、McASP、16 位元 EMIFA TMS320C6727 C67x 浮點 DSP - 高達 250MHz、McASP、32 位元 EMIFA TMS320C6727B C67x 浮點 DSP - 高達 350MHz、McASP、32 位元 EMIFA TMS320C6743 低功耗 C674x 浮點 DSP- 375MHz TMS320C6745 低功耗 C674x 浮點 DSP- 456MHz,QFP TMS320C6747 低功耗 C674x 浮點 DSP- 456MHz,PBGA TMS320DM642Q 視訊/成像定點數位訊號處理器 TMS320DM6431Q 數位媒體處理器,高達 2400 MIPS、300 MHz 時脈速率 TMS320DM6435Q 數位媒體處理器,最高達 4800 MIPS、600 MHz 時脈速率、1 McASP、1 McBSP TMS320DM6437Q 數位媒體處理器,最高達 4800MIPS、600 MHz 時鐘速率、1 McASP、2 McBSP TMS320DM6441 DaVinci 數位媒體晶片系統 TMS320DM6467T 數位媒體晶片系統 TMS320DM647 數位媒體處理器
下載選項
驅動程式或資料庫

VOLIB Voice library (VoLIB) for C66x, C64x+ and C55x processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

支援產品和硬體

支援產品和硬體

產品
Arm 式處理器
66AK2G12 高效能多核心 DSP+Arm - 1x Arm A15 核心、1x C66x DSP 核心
數位訊號處理器 (DSP)
DM505 適用視覺分析 15mm 封裝的 SoC SM320C6424-EP 強化型產品 C6424 定點 DSP SM320C6472-HIREL 高可靠性產品 6 核心 C6472 定點 DSP SM320C6678-HIREL 高可靠性產品高效能 8 核心 C6678 定點和浮點 DSP SM320C6701 軍用應用的單核 C67x 浮點 DSP - 高達 167MHz SM320C6701-EP 增強型產品 C6701 浮點 DSP SMJ320C6203 軍用級 C62x 定點 DSP - 陶瓷封裝 SMJ320C6701 軍用級 C67x 浮點 DSP - 陶瓷封裝 SMJ320C6701-SP 航太級 C6701 浮點 DSP - 具陶瓷封裝的抗輻射 V 類 SMV320C6727B-SP 航太級 C6727B 浮點 DSP - 具陶瓷封裝的抗輻射 V 類 TMS320C5517 低功耗 C55x 定點 DSP - 高達 200MHz、USB、LCD 介面、FFT HWA、SAR ADC TMS320C5532 低功耗 C55x 定點 DSP - 高達 100MHz TMS320C5533 低功耗 C55x 定點 DSP - 高達 100MHz、USB TMS320C5534 低功耗 C55x 定點 DSP - 高達 100MHz、USB、LCD 介面 TMS320C5535 低功耗 C55x 定點 DSP - 高達 100MHz、USB、LCD 介面、FFT HWA、SAR ADC TMS320C6202B C62x 定點 DSP - 高達 300MHz、384KB TMS320C6203B C62x 定點 DSP - 高達 300MHz、896KB TMS320C6211B C62x 定點 DSP - 高達 167MHz TMS320C6421Q C64x+ 定點 DSP - 最高 600MHz、8 位元 EMIFA、16 位元 DDR2 TMS320C6424Q C64x+ 定點 DSP - 最高 600MHz、16/8 位元 EMIFA、32/16 位元 DDR2 TMS320C6454 C64x+ 定點 DSP - 高達 1GHz、64 位元 EMIFA、32/16 位元 DDR2、1 Gbps 乙太網路 TMS320C6457 通訊基礎設施數位訊號處理器 TMS320C6701 C67x 浮點 DSP - 高達 167MHz、McBSP TMS320C6711D C67x 浮點 DSP - 高達 250MHz、McBSP、32 位元 EMIFA TMS320C6712D C67x 浮點 DSP - 高達 150MHz、McBSP、16 位元 EMIFA TMS320C6720 C67x 浮點 DSP - 200MHz、McASP、16 位元 EMIFA TMS320C6722B C67x 浮點 DSP - 高達 250MHz、McASP、16 位元 EMIFA TMS320C6726B C67x 浮點 DSP - 高達 266MHz、McASP、16 位元 EMIFA TMS320C6727 C67x 浮點 DSP - 高達 250MHz、McASP、32 位元 EMIFA TMS320C6727B C67x 浮點 DSP - 高達 350MHz、McASP、32 位元 EMIFA TMS320C6743 低功耗 C674x 浮點 DSP- 375MHz TMS320C6745 低功耗 C674x 浮點 DSP- 456MHz,QFP TMS320C6747 低功耗 C674x 浮點 DSP- 456MHz,PBGA TMS320DM642Q 視訊/成像定點數位訊號處理器 TMS320DM6431Q 數位媒體處理器,高達 2400 MIPS、300 MHz 時脈速率 TMS320DM6435Q 數位媒體處理器,最高達 4800 MIPS、600 MHz 時脈速率、1 McASP、1 McBSP TMS320DM6437Q 數位媒體處理器,最高達 4800MIPS、600 MHz 時鐘速率、1 McASP、2 McBSP TMS320DM6441 DaVinci 數位媒體晶片系統 TMS320DM6467T 數位媒體晶片系統 TMS320DM647 數位媒體處理器
下載選項
IDE、配置、編譯器或偵錯程式

CCSTUDIO Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It comprises a suite of tools used to develop and debug embedded applications.  Code Composer Studio is available for download across Windows®, Linux® and macOS® desktops. It can also (...)

支援產品和硬體

支援產品和硬體

此設計資源支援此類別中多數產品。

檢查產品詳細資料頁面以確認支援。

啟動 下載選項
封裝 針腳 CAD 符號、佔位空間與 3D 模型
PBGA (GDU) 376 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片