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TPS54424

現行

4.5V 至 17V 輸入、電流模式、4A 同步 SWIFT™ 降壓轉換器

產品詳細資料

Rating Catalog Topology Buck Iout (max) (A) 4 Vin (max) (V) 17 Vin (min) (V) 4.5 Vout (max) (V) 12 Vout (min) (V) 0.6 Features Enable, Frequency synchronization, Power good, Prebias startup, Soft-start adjustable, Synchronous rectification, Tracking EMI features Low parasitic Hotrod packaging Control mode current mode Switching frequency (min) (kHz) 200 Switching frequency (max) (kHz) 1600 Operating temperature range (°C) -40 to 150 Iq (typ) (µA) 580 Duty cycle (max) (%) 98 Type Converter
Rating Catalog Topology Buck Iout (max) (A) 4 Vin (max) (V) 17 Vin (min) (V) 4.5 Vout (max) (V) 12 Vout (min) (V) 0.6 Features Enable, Frequency synchronization, Power good, Prebias startup, Soft-start adjustable, Synchronous rectification, Tracking EMI features Low parasitic Hotrod packaging Control mode current mode Switching frequency (min) (kHz) 200 Switching frequency (max) (kHz) 1600 Operating temperature range (°C) -40 to 150 Iq (typ) (µA) 580 Duty cycle (max) (%) 98 Type Converter
VQFN-HR (RNV) 18 12.25 mm² 3.5 x 3.5
  • Small 3.5-mm × 3.5-mm HotRod™ QFN Package
  • Integrated 14.1-mΩ and 6.1-mΩ MOSFETs
  • Peak Current Mode Control With Fast Transient Response
  • 200-kHz to 1.6-MHz Fixed Switching Frequency
  • Synchronizes to External Clock
  • 0.6-V Voltage Reference ±0.85% Over Temperature
  • 0.6-V to 12-V Output Voltage Range
  • Hiccup Current Limit
  • Safe Start-Up into Pre-Biased Output Voltage
  • Adjustable Soft Start and Power Sequencing
  • Adjustable Input Undervoltage Lockout
  • 3-µA Shutdown Current
  • Power Good Output Monitor for Undervoltage and Overvoltage
  • Output Overvoltage Protection
  • Non-latch Thermal Shutdown Protection
  • –40°C to 150°C Operating Junction Temperature
  • Create a Custom Design Using the TPS54424 With the WEBENCH® Power Designer
  • Small 3.5-mm × 3.5-mm HotRod™ QFN Package
  • Integrated 14.1-mΩ and 6.1-mΩ MOSFETs
  • Peak Current Mode Control With Fast Transient Response
  • 200-kHz to 1.6-MHz Fixed Switching Frequency
  • Synchronizes to External Clock
  • 0.6-V Voltage Reference ±0.85% Over Temperature
  • 0.6-V to 12-V Output Voltage Range
  • Hiccup Current Limit
  • Safe Start-Up into Pre-Biased Output Voltage
  • Adjustable Soft Start and Power Sequencing
  • Adjustable Input Undervoltage Lockout
  • 3-µA Shutdown Current
  • Power Good Output Monitor for Undervoltage and Overvoltage
  • Output Overvoltage Protection
  • Non-latch Thermal Shutdown Protection
  • –40°C to 150°C Operating Junction Temperature
  • Create a Custom Design Using the TPS54424 With the WEBENCH® Power Designer

The TPS54424 is a full-featured 17-V (19-V maximum), 4-A synchronous step-down DC/DC converter in a 3.5 mm × 3.5 mm HotRod™ QFN package.

The device is optimized for small solution size through high efficiency and integrating the high-side and low-side MOSFETs. Further space savings are achieved through peak current mode control, which reduces component count, and by selecting a high switching frequency, reducing the inductor footprint.

The peak current mode control simplifies the loop compensation and provides fast transient response. Cycle-by-cycle peak current limiting on the high-side and low-side sourcing current limit protects the device in overload situations. Hiccup limits MOSFET power dissipation if a short circuit or over loading fault persists.

A power good supervisor circuit monitors the regulator output. The PGOOD pin is an open-drain output and goes high impedance when the output voltage is in regulation. An internal deglitch time prevents the PGOOD pin from pulling low unless a fault has occurred.

A dedicated EN pin can be used to control the regulator on/off and adjust the input undervoltage lockout. The output voltage start-up ramp is controlled by the SS/TRK pin, which allows operation as either a standalone power supply or in tracking situations.

The TPS54424 is a full-featured 17-V (19-V maximum), 4-A synchronous step-down DC/DC converter in a 3.5 mm × 3.5 mm HotRod™ QFN package.

The device is optimized for small solution size through high efficiency and integrating the high-side and low-side MOSFETs. Further space savings are achieved through peak current mode control, which reduces component count, and by selecting a high switching frequency, reducing the inductor footprint.

The peak current mode control simplifies the loop compensation and provides fast transient response. Cycle-by-cycle peak current limiting on the high-side and low-side sourcing current limit protects the device in overload situations. Hiccup limits MOSFET power dissipation if a short circuit or over loading fault persists.

A power good supervisor circuit monitors the regulator output. The PGOOD pin is an open-drain output and goes high impedance when the output voltage is in regulation. An internal deglitch time prevents the PGOOD pin from pulling low unless a fault has occurred.

A dedicated EN pin can be used to control the regulator on/off and adjust the input undervoltage lockout. The output voltage start-up ramp is controlled by the SS/TRK pin, which allows operation as either a standalone power supply or in tracking situations.

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檢視所有 18
類型 標題 日期
* Data sheet TPS54424 4.5-V to 17-V (19-V Maximum) Input, 4-A Synchronous SWIFT™ Step-Down Converter datasheet PDF | HTML 2018年 1月 23日
User guide TPS54424 SWIFT™ Step-Down Converter Evaluation Module User's Guide (Rev. A) PDF | HTML 2021年 9月 2日
Application note Step-Dwn (Buck) Convrtr Pwer Solutions for Programmable Logic Controller Systems (Rev. A) PDF | HTML 2021年 7月 26日
Application note DC/DC Converter Solutions for Hardware Accelerators in Data Center Applications (Rev. A) PDF | HTML 2021年 5月 4日
Application note Non-Isolated Point-of-Load Solutions for Tiger Lake in PC Applications (Rev. B) PDF | HTML 2021年 4月 29日
Selection guide Buck Converter Quick Reference Guide (Rev. B) 2021年 4月 8日
Application note Point-of-Load Solutions for Data Center App Implementing VR13.HC Vccin Spec (Rev. A) PDF | HTML 2020年 1月 8日
Application note Understanding Flip Chip QFN (HotRod) and Standard QFN Performance Differences 2019年 7月 2日
Application note Minimizing Output Ripple During Startup (Rev. A) 2019年 5月 20日
Application note DC/DC Point-of-load Power Solutions for Wired Networking Switch Systems 2018年 12月 11日
Application note Optimizing Layout of the TPS54824 HotRod™ Package for Thermal Performance 2018年 11月 16日
Application note Solve Point-of-Load Power Design Challenges: Single Board Computer Applications 2018年 8月 24日
Application note Create an Inverting Power Supply Using a Synchronous Step-Down Regulator (Rev. B) 2018年 6月 25日
White paper Measuring various types of low-frequency noise in DC/DC switching converters 2018年 2月 1日
Analog Design Journal Reducing noise on the output of a switching regulator 2018年 1月 4日
Application note Minimizing Output Ripple During Startup 2017年 6月 22日
Application note HotRod QFN Application Note 2014年 4月 9日
Application note Ultra Small 5A, Adjustable Output Reference design using TPS54620 2010年 5月 21日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TPS54424EVM-779 — TPS54424 4A 同步 SWIFT™ 降壓型轉換器評估模組

TPS54424EVM-779 是一款 4A 同步轉換器評估模組 (EVM)。  TPS54424 是一款同步降壓轉換器,其整合兩個功率 MOSFET,可將解決方案尺寸降至最低,並在全負載時提供高效率。固定頻率峰值電流模式控制用於降低期間和按時抖動。強制連續傳導模式可將切換頻率維持在低負載時固定,並提供來往低負載的快速瞬態回應。

使用指南: PDF | HTML
TI.com 無法提供
模擬型號

TPS54424 PSpice Transient Model

SLVMC62.ZIP (93 KB) - PSpice Model
模擬型號

TPS54424 TINA-TI Average Reference Design

SLVMCN3.TSC (153 KB) - TINA-TI Reference Design
模擬型號

TPS54424 TINA-TI Average Spice Model

SLVMCN4.ZIP (9 KB) - TINA-TI Spice Model
參考設計

TIDA-01510 — 配備 DC/DC 轉換器且可提高功率密度的雙面佈線圖參考設計

此參考設計展示了設計雙面 DC/DC 佈局的正確方法,以實現更高的電源供應密度。設計指南重點介紹了常見錯誤及避免錯誤的方法,並附上測試結果,顯示在雙面佈局中正確使用 TPS54824 元件不會影響性能。若 TPS54824 降壓轉換器的 8A 輸出過高,該設計也可使用 TPS54424 裝置,這是一款 4A 引腳兼容的替代方案。
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN-HR (RNV) 18 Ultra Librarian

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  • 認證摘要
  • 進行中持續性的可靠性監測
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