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線性與低壓差 (LDO) 穩壓器

TPS7A56

現行

6A、低輸入電壓、低雜訊、高準確度、低壓差 (LDO) 電壓穩壓器

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功能相同，但針腳輸出與所比較的裝置不同。
最新 TPS7N59 預覽 10A、低輸入電壓、低雜訊、高準確度、超低壓差 (LDO) 電壓穩壓器 Higher load current with improved thermal resistance

TPS7A56

現行
產品規格表 立即訂購

產品詳細資料

Rating Catalog Vin (max) (V) 6 Vin (min) (V) 0.7 Iout (max) (A) 6 Output options Adjustable Output Vout (max) (V) 5.2 Vout (min) (V) 0.5 Noise (µVrms) 2.45 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 5 Features Enable, Foldback Overcurrent protection, Output discharge, Power good, Soft start Thermal resistance θJA (°C/W) 40.3 Load capacitance (min) (µF) 15 Regulated outputs (#) 1 Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 90 Operating temperature range (°C) -40 to 125
Rating Catalog Vin (max) (V) 6 Vin (min) (V) 0.7 Iout (max) (A) 6 Output options Adjustable Output Vout (max) (V) 5.2 Vout (min) (V) 0.5 Noise (µVrms) 2.45 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 5 Features Enable, Foldback Overcurrent protection, Output discharge, Power good, Soft start Thermal resistance θJA (°C/W) 40.3 Load capacitance (min) (µF) 15 Regulated outputs (#) 1 Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 90 Operating temperature range (°C) -40 to 125
WQFN (RTE) 16 9 mm² (3 mm × 3 mm)
  • Input voltage range:
    • Without BIAS: 1.1V to 6.0V
    • With BIAS: 0.7V to 6.0V
  • Output voltage noise: 2.45µVRMS
  • 1% (max) accuracy over line, load, and temperature
  • Low dropout: 90mV at 6A
  • Power-supply rejection ratio (6A):
    • 100dB at 1kHz
    • 78dB at 10kHz
    • 60dB at 100kHz
    • 36dB at 1MHz
  • Load transient response:
    • ±3mV with a 100mA to 6A load step
  • Adjustable output voltage range: 0.5V to 5.0V
  • Adjustable soft-start inrush control
  • BIAS rail:
    • Internal charge pump or 3V to 11V external rail
    • Internal charge pump is able to be disabled
  • Open-drain, power-good (PG) output
  • Package:
    • 3mm × 3mm, 16-pin WQFN
    • EVM RθJA: 21.9°C/W
  • Input voltage range:
    • Without BIAS: 1.1V to 6.0V
    • With BIAS: 0.7V to 6.0V
  • Output voltage noise: 2.45µVRMS
  • 1% (max) accuracy over line, load, and temperature
  • Low dropout: 90mV at 6A
  • Power-supply rejection ratio (6A):
    • 100dB at 1kHz
    • 78dB at 10kHz
    • 60dB at 100kHz
    • 36dB at 1MHz
  • Load transient response:
    • ±3mV with a 100mA to 6A load step
  • Adjustable output voltage range: 0.5V to 5.0V
  • Adjustable soft-start inrush control
  • BIAS rail:
    • Internal charge pump or 3V to 11V external rail
    • Internal charge pump is able to be disabled
  • Open-drain, power-good (PG) output
  • Package:
    • 3mm × 3mm, 16-pin WQFN
    • EVM RθJA: 21.9°C/W

The TPS7A56 is a low-noise (2.45µVRMS), ultra-low-dropout linear regulator (LDO) capable of sourcing 6A with only 90mV of dropout, independently of the output voltage. The device output voltage is adjustable from 0.5V to 5V using a single external resistor. The combination of low noise, high PSRR (36dB at 1MHz), and high output-current capability makes the TPS7A56 designed for powering noise-sensitive components. These components (such as RF amplifiers, radar sensors, SERDES, and analog chipsets) are found in radar power, communication, and imaging applications.

Digital loads requiring low-input, low-output (LILO) voltage operation also benefit from exceptional accuracy, remote sensing, transient performance, and soft-start capabilities to provide best system performance. These loads include application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs). The versatility, performance, and small footprint make this LDO an excellent choice for high-current analog loadsand digital loads such as serializer/deserializers (SerDes), FPGAs, and DSPs. High-current analog loads include analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and imaging sensors.

The TPS7A56 is a low-noise (2.45µVRMS), ultra-low-dropout linear regulator (LDO) capable of sourcing 6A with only 90mV of dropout, independently of the output voltage. The device output voltage is adjustable from 0.5V to 5V using a single external resistor. The combination of low noise, high PSRR (36dB at 1MHz), and high output-current capability makes the TPS7A56 designed for powering noise-sensitive components. These components (such as RF amplifiers, radar sensors, SERDES, and analog chipsets) are found in radar power, communication, and imaging applications.

Digital loads requiring low-input, low-output (LILO) voltage operation also benefit from exceptional accuracy, remote sensing, transient performance, and soft-start capabilities to provide best system performance. These loads include application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs). The versatility, performance, and small footprint make this LDO an excellent choice for high-current analog loadsand digital loads such as serializer/deserializers (SerDes), FPGAs, and DSPs. High-current analog loads include analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and imaging sensors.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TPS7A56 6A, Low-VIN , Low-Noise, High-Accuracy, Ultra-Low Dropout (LDO) Voltage Regulator datasheet PDF | HTML 2025/3/21
白皮書 測量超低雜訊 LDO 的輸出雜訊 PDF | HTML PDF | HTML 2025/5/12

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TPS7A57EVM-056 — 適用於 5-A、低 VIN、低雜訊、高精確度 LDO 電壓穩壓器的 TPS7A57 評估模組

TPS7A57 評估模組 (EVM) 可協助設計工程師評估 TPS7A57 線性穩壓器的運作及性能，適合其本身的電路應用。此 EVM 配置包含適合各種廣泛應用的單一低雜訊、高準確度、線性穩壓器。穩壓器能以低 VIN 至 VOUT 壓差為負載提供最高 5 A。

為維持穩定性，使用 22-µF (最小值) 至最高 3-mF 的輸出電容器。可新增高性能負載瞬態電路，以改善 EVM 的測量能力。

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模擬型號

TPS7A5601 PSPICE Transient Model

SBVMA08.ZIP (22 KB) - PSpice 模型
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計算工具

PARALLEL-LDO-CALC — Parallel low-dropout (LDO) calculator

並聯低壓差 (LDO) 計算器是以 Microsoft® Excel® 為基礎的工具，可為使用鎮流器電阻器的並聯 LDO 穩壓器提供最壞情況分析。此工具可幫助使用者判斷所需的並聯 LDO 穩壓器最小數量，以及適合系統要求集的最佳鎮流器電阻。

在並聯應用中使用的常用 LDO 穩壓器的產品規格書資訊會預先填入計算機中。使用者可根據自己的系統需求，評估最符合其系統需求的 LDO 穩壓器裝置。

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WQFN (RTE) 16 Ultra Librarian
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