TPS7N59
- Input voltage range: 0.7V to 6.0V
- Output voltage noise: 2.5µVRMS
- 1% (max) accuracy over line, load, and temperature
- Low dropout: 150mV (typ) at 10A
- Power-supply rejection ratio (10A):
- 84dB at 1kHz
- 64dB at 10kHz
- 49dB at 100kHz
- 30dB at 1MHz
- Excellent load transient response:
- ±20mV with a 10mA to 10A load step
- Adjustable output voltage range: 0.5V to 5.2V
- Adjustable soft-start inrush control
- BIAS rail: 3V to 12V external rail
- Open-drain, power-good (PG) output
- Package: 4mm × 4mm, 24-pin WQFN
- EVM RθJA: 14.3°C/W
The TPS7N59 is a low-noise (2.5µVRMS), ultra-low-dropout linear regulator (LDO) capable of sourcing 10A with only 150mV of dropout, independently of the output voltage. The device output voltage is adjustable from 0.5V to 5.2V using a single external resistor. The combination of low noise, high PSRR (30 dB at 1MHz), and high output-current capability makes the TPS7N59 designed for powering noise-sensitive components (such as RF amplifiers, radar sensors, SERDES and analog chipsets) found in radar power, communication, and imaging applications.
Digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input, low-output (LILO) voltage operation also benefit from the exceptional accuracy (1% over load, line, and temperature), remote sensing, excellent transient performance, and soft-start capabilities to provide good system performance. The versatility, performance, and small footprint solution make this LDO an excellent choice for high-current analog loads such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and imaging sensors as well as digital loads such as serializer/deserializers (SerDes), FPGAs, and DSPs.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | TPS7N59 10A, Low-VIN , Low-Noise, High-Accuracy, Ultra-Low Dropout (LDO) Voltage Regulator datasheet (Rev. A) | PDF | HTML | 2026/3/3 |
設計與開發
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TPS7N59EVM-184 — TPS7N59 評估模組
PARALLEL-LDO-CALC — Parallel low-dropout (LDO) calculator
並聯低壓差 (LDO) 計算器是以 Microsoft® Excel® 為基礎的工具,可為使用鎮流器電阻器的並聯 LDO 穩壓器提供最壞情況分析。此工具可幫助使用者判斷所需的並聯 LDO 穩壓器最小數量,以及適合系統要求集的最佳鎮流器電阻。
在並聯應用中使用的常用 LDO 穩壓器的產品規格書資訊會預先填入計算機中。使用者可根據自己的系統需求,評估最符合其系統需求的 LDO 穩壓器裝置。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (RTW) | 24 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。