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UCC27222

現行

高效預測同步降壓驅動器

現在提供此產品的更新版本

open-in-new 比較替代產品
功能相同,但引腳輸出與所比較的裝置不同
最新 UCC27302A 現行 120V 4.5A half-bridge driver with 5V UVLO, interlock, and enable options More recent driver with integrated bootstrap diode, higher voltage rating, input interlock and smaller package options

產品詳細資料

Bootstrap supply voltage (max) (V) 30 Power switch MOSFET Input supply voltage (min) (V) 5 Input supply voltage (max) (V) 20 Peak output current (A) 3 Operating temperature range (°C) -40 to 105 Undervoltage lockout (typ) (V) 4 Rating Catalog Propagation delay time (µs) 0.06 Rise time (ns) 17 Fall time (ns) 17 Iq (mA) 4.7 Input threshold TTL Channel input logic TTL Switch node voltage (V) -0.3 Features Dead time control, Soft switching, Synchronous Rectification Driver configuration Inverting, Noninverting
Bootstrap supply voltage (max) (V) 30 Power switch MOSFET Input supply voltage (min) (V) 5 Input supply voltage (max) (V) 20 Peak output current (A) 3 Operating temperature range (°C) -40 to 105 Undervoltage lockout (typ) (V) 4 Rating Catalog Propagation delay time (µs) 0.06 Rise time (ns) 17 Fall time (ns) 17 Iq (mA) 4.7 Input threshold TTL Channel input logic TTL Switch node voltage (V) -0.3 Features Dead time control, Soft switching, Synchronous Rectification Driver configuration Inverting, Noninverting
HTSSOP (PWP) 14 32 mm² 5 x 6.4
  • Maximizes Efficiency by Minimizing Body-Diode Conduction and Reverse Recovery Losses
  • Transparent Synchronous Buck Gate Drive Operation From the Single Ended PWM Input Signal
  • 12-V or 5-V Input Operation
  • 3.3-V Input Operation With Availability of 12-V Bus Bias
  • High-Side and Low-Side ±3-A Dual Drivers
  • On-Board 6.5-V Gate Drive Regulator
  • ±3.3-A TrueDrive™ Gate Drives for High Current Delivery at MOSFET Miller Thresholds
  • Automatically Adjusts for Changing Operating Conditions
  • Thermally Enhanced 14-Pins PowerPAD™ HTSSOP Package Minimizes Board Area and Junction Temperature Rise
  • APPLICATIONS
    • Non-Isolated Single or Multi-phased DC-to-DC Converters for Processor Power, General Computer, Telecom and Datacom Applications

Predictive Gate Drive™ and PowerPAD™ are trademarks of Texas Instruments Incorporated.

  • Maximizes Efficiency by Minimizing Body-Diode Conduction and Reverse Recovery Losses
  • Transparent Synchronous Buck Gate Drive Operation From the Single Ended PWM Input Signal
  • 12-V or 5-V Input Operation
  • 3.3-V Input Operation With Availability of 12-V Bus Bias
  • High-Side and Low-Side ±3-A Dual Drivers
  • On-Board 6.5-V Gate Drive Regulator
  • ±3.3-A TrueDrive™ Gate Drives for High Current Delivery at MOSFET Miller Thresholds
  • Automatically Adjusts for Changing Operating Conditions
  • Thermally Enhanced 14-Pins PowerPAD™ HTSSOP Package Minimizes Board Area and Junction Temperature Rise
  • APPLICATIONS
    • Non-Isolated Single or Multi-phased DC-to-DC Converters for Processor Power, General Computer, Telecom and Datacom Applications

Predictive Gate Drive™ and PowerPAD™ are trademarks of Texas Instruments Incorporated.

The UCC27221 and UCC27222 are high-speed synchronous buck drivers for today’s high-efficiency, lower-output voltage designs. Using Predictive Gate Drive™ (PGD) control technology, these drivers reduce diode conduction and reverse recovery losses in the synchronous rectifier MOSFET(s). The UCC27221 has an inverted PWM input while the UCC27222 has a non-inverting PWM input.

Predictive Gate Drive™ technology uses control loops which are stabilized internally and are therefore transparent to the user. These loops use no external components, so no additional design is needed to take advantage of the higher efficiency of these drivers.

This closed loop feedback system detects body-diode conduction, and adjusts deadtime delays to minimize the conduction time interval. This virtually eliminates body-diode conduction while adjusting for temperature, load- dependent delays, and for different MOSFETs. Precise gate timing at the nanosecond level reduces the reverse recovery time of the synchronous rectifier MOSFET body-diode, reducing reverse recovery losses seen in the main (high-side) MOSFET. The lower junction temperature in the low-side MOSFET increases product reliability. Since the power dissipation is minimized, a higher switching frequency can also be used, allowing for smaller component sizes.

The UCC27221 and UCC27222 are offered in the thermally enhanced 14-pin PowerPAD package with 2°C/W jc.

The UCC27221 and UCC27222 are high-speed synchronous buck drivers for today’s high-efficiency, lower-output voltage designs. Using Predictive Gate Drive™ (PGD) control technology, these drivers reduce diode conduction and reverse recovery losses in the synchronous rectifier MOSFET(s). The UCC27221 has an inverted PWM input while the UCC27222 has a non-inverting PWM input.

Predictive Gate Drive™ technology uses control loops which are stabilized internally and are therefore transparent to the user. These loops use no external components, so no additional design is needed to take advantage of the higher efficiency of these drivers.

This closed loop feedback system detects body-diode conduction, and adjusts deadtime delays to minimize the conduction time interval. This virtually eliminates body-diode conduction while adjusting for temperature, load- dependent delays, and for different MOSFETs. Precise gate timing at the nanosecond level reduces the reverse recovery time of the synchronous rectifier MOSFET body-diode, reducing reverse recovery losses seen in the main (high-side) MOSFET. The lower junction temperature in the low-side MOSFET increases product reliability. Since the power dissipation is minimized, a higher switching frequency can also be used, allowing for smaller component sizes.

The UCC27221 and UCC27222 are offered in the thermally enhanced 14-pin PowerPAD package with 2°C/W jc.

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open-in-new 比較替代產品
功能相同,但引腳輸出與所比較的裝置不同
UCC27311A 現行 120V 4.5A half-bridge driver with 8V UVLO and enable options More recent driver with integrated bootstrap diode, higher voltage rating, 8V UVLO and smaller package options

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類型 標題 日期
* Data sheet High-Efficiency Predictive Synchronous Buck Driver datasheet (Rev. B) 2003年 7月 16日

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  • 認證摘要
  • 進行中持續性的可靠性監測
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