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SN65LV1224BMDBREP ACTIVE

Enhanced product 1:10 LVDS SerDes receiver 100 to 660-Mbps

Same as: V62/06677-02XE   This part number is identical to the part number listed above. You can only order quantities of the part number listed above.

US ECCN: EAR99 US/Local Export Classification Number

NEW - Custom reel may be available
Inventory: 361  
 

Quality information

RoHS Yes
REACH Yes
Lead finish / Ball material NIPDAU
MSL rating / Peak reflow Level-1-260C-UNLIM
Quality, reliability
& packaging information

Information included:

  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
View or download

Packaging information

Package | Pins Package qty | Carrier: Operating temperature range (°C)
SSOP (DB) | 28 2,000 | LARGE T&R
Custom reel may be available
-55 to 125
Package | Pins SSOP (DB) | 28
Package qty | Carrier: 2,000 | LARGE T&R
Custom reel may be available
Operating temperature range (°C) -55 to 125
View TI packaging information

Features for the SN65LV1224B-EP

  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • 100-Mbps to 660-Mbps Serial LVDS DataPayload Bandwidth at 10-MHz to 66-MHz System Clock
  • Pin-Compatible Superset of DS92LV1023/DS92LV1224
  • Chipset (Serializer/Deserializer) Power Consumption <450 mW (Typ) at 66 MHz
  • Synchronization Mode for Faster Lock
  • Lock Indicator
  • No External Components Required for PLL
  • 28-Pin SSOP and Space Saving 5 × 5 mm QFN Packages Available
  • Programmable Edge Trigger on Clock
  • Flow-Through Pinout for Easy PCB Layout

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

Description for the SN65LV1224B-EP

The SN65LV1023A serializer and SN65LV1224B deserializer comprise a 10-bit serdes chipset designed to transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 10 MHz to 66 MHz. Including overhead, this translates into a serial data rate between 120-Mbps and 792-Mbps payload encoded throughput.

Upon power up, the chipset link can be initialized via a synchronization mode with internally generated SYNC patterns or the deserializer can be allowed to synchronize to random data. By using the synchronization mode, the deserializer establishes lock within specified, shorter time parameters.

The device can be entered into a power-down state when no data transfer is required. Alternatively, a mode is available to place the output pins in the high-impedance state without losing PLL lock.

The SN65LV1023A and SN65LV1224B are characterized for operation over ambient air temperature of -55°C to 125°C.

Pricing


Qty Price (USD)
1-99 12.052
100-249 10.527
250-999 8.117
1,000+ 7.26

Additional package qty | carrier options

Package qty | Carrier 2,000 | LARGE T&R
Inventory 361
Qty | Price (USD) 1ku | 7.26 1-99 12.052 100-249 10.527 250-999 8.117 1,000+ 7.26
Custom reel may be available