The CDCLVC1310 is a highly versatile, low-jitter, low-power clock fanout buffer which can distribute to ten low-jitter LVCMOS clock outputs from one of three inputs, whose primary and secondary inputs can feature differential or single-ended signals and crystal input. Such a buffer is good for use in a variety of mobile and wired infrastructure, data communication, computing, low-power medical imaging, and portable test and measurement applications. When the input is an illegal level, the output is at a defined state. One can set the core to 2.5 V or 3.3 V, and output to 1.5 V, 1.8 V, 2.5 V or 3.3 V. Pin programming easily configures the CDCLVC1310. The overall additive jitter performance is 25 fsRMS (typical). The CDCLVC1310 comes in a small 32-pin 5-mm × 5-mm QFN package.
|Part number||Order||Additive RMS jitter (Typ) (fs)||Output frequency (Max) (MHz)||Input type||Number of outputs||Output type||VCC out (V)||Operating temperature range (C)||Rating|
|-40 to 85||Catalog|