CDCDB2000 DB2000QL compliant 20-output clock buffer for PCIe Gen 1 to Gen 5

Description

The CDCDB2000 is a 20-output LP-HCSL, DB2000QL compliant, clock buffer capable of distributing the reference clock for PCIe Gen 1-5, QuickPath Interconnect (QPI), UPI, SAS, and SATA interfaces. The SMBus, SBI, and 8 output enable pins allow the configuration and control of all 20 outputs individually. The CDCDB2000 is a DB2000QL derivative buffer and meets or exceeds the system parameters in the DB2000QL specification. The CDCDB2000 is packaged in a 6-mm × 6-mm TLGA/GQFN package with 80 leads.

Features

20 LP-HCSL outputs with integrated 85-Ω output terminations
8 hardware output enable (OE#) controls
Additive phase jitter after DB2000QL filter:
< 0.08ps rms
Supports PCIe Gen 4 and Gen 5 Common Clock (CC) and Individual Reference (IR) architectures
- Spread spectrum-compatible
Cycle-to-cycle jitter: < 50 ps
Output-to-output skew: < 50 ps
Input-to-output delay: < 3 ns
3.3-V core and IO supply voltages
Hardware-controlled low power mode (PD#)
Side-Band Interface (SBI) for output control in PD# mode
9 selectable SMBus addresses
Power consumption: < 600 mW
6-mm × 6-mm, 80-pin TLGA/GQFN package

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Parametrics

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Part number	Order	Function	Additive RMS jitter (Typ) (fs)	Output frequency (Max) (MHz)	Number of outputs	VCC out (V)	VCC core (V)	Output skew (ps)	Features	Operating temperature range (C)	Rating	Output type	Package Group	Package size: mm2:W x L (PKG)	Input type
CDCDB2000	Order now	Differential	80	250	20	3.3	3.3	50	1:20 fanout PCIe Gen 1-5 compliance DB2000QL compliant SMBus control Side-Band Interface OE# control	-40 to 85	Catalog	LP-HCSL	TLGA \| 80	80TLGA: 36 mm2: 6 x 6 (TLGA \| 80)	LP-HCSL
CDCUN1208LP	Order now	Differential Fanout	200	400	8	1.8 2.5 3.3	1.8 2.5 3.3	50	3.3-V VCC/VDD I2C interface Pin programmable	-40 to 85	Catalog	HCSL	VQFN \| 32	32VQFN: 25 mm2: 5 x 5 (VQFN \| 32)	HCSL
CDCV304	Order now	Single-ended	56	200	4	2.5 3.3	2.5 3.3	150	1:4 fanout	-40 to 85	Catalog	LVTTL	TSSOP \| 8	8TSSOP: 19 mm2: 6.4 x 3 (TSSOP \| 8)	LVTTL
LMK00334	Order now	Differential Fanout	30	400	4	2.5 3.3	3.3	50	PCIe Gen 4 Compliant	-40 to 85	Catalog	HCSL LVCMOS	WQFN \| 32	32WQFN: 25 mm2: 5 x 5 (WQFN \| 32)	CML HCSL HSTL LVCMOS LVDS LVPECL SSTL XTAL
LMK00338	Order now	Differential Fanout	30	400	8	2.5 3.3	3.3	50	PCIe 3.0 Compliant	-40 to 85	Catalog	HCSL LVCMOS	WQFN \| 40	40WQFN: 36 mm2: 6 x 6 (WQFN \| 40)	CML HCSL HSTL LVCMOS LVDS LVPECL LVTTL SSTL XTAL

CDCDB2000 ACTIVE This product has been released to the market and is available for purchase. For some products, newer alternatives may be available. DB2000QL compliant 20-output clock buffer for PCIe Gen 1 to Gen 5

Description

Features

Parametrics

CDCDB2000
ACTIVE

This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.

DB2000QL compliant 20-output clock buffer for PCIe Gen 1 to Gen 5