In this method of data retrieval, ADC1 conversion data are shifted out directly from the output shift register. No opcode is necessary. Read data direct requires that no serial activity occur from the time of DRDY low to the readback, or the data are invalid. The serial interface is full duplex; therefore, commands are decoded during the data readback. If no command is intended, keep the DIN pin low during readback. If an input command is sent during readback, the ADC executes the command, and data interruption may result. The data readback operation must be completed 16 fCLK cycles before the next DRDY, or the old data are overwritten with new data. Synchronize the data readback to DRDY or to DOUT/DRDY to make sure the data are read before the next DRDY falling edge.
If new ADC1 conversion data are ready during an ongoing data or register read or write operation, data are not loaded to the output register but are written only to the data holding register. Retrieve the conversion data later from the holding register by sending a read command. However, writing new data to certain registers results in a conversion-cycle restart. Conversion restart clears the contents of the conversion data-holding register; therefore, the previous conversion data are not available. Read the conversion data before the register write operation.
As shown in Figure 9-43, the ADC1 data field is 4, 5, or 6 bytes long, depending on programming. The data field consists of an optional status byte, four bytes of conversion data, and an optional checksum byte. After all the bytes are read, the data-byte sequence is repeated by continuing SCLK. The byte sequence repeats starting with the first byte. In order to help verify error-free communication, read the same data multiple times in each conversion interval and compare.