SLUSDV2C May   2020  – June 2026 BQ25798

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Device Power-On-Reset
      2. 7.3.2  PROG Pin Configuration
      3. 7.3.3  Device Power Up from Battery without Input Source
      4. 7.3.4  Device Power Up from Input Source
        1. 7.3.4.1 Power Up REGN LDO
        2. 7.3.4.2 Poor Source Qualification
        3. 7.3.4.3 ILIM_HIZ Pin
        4. 7.3.4.4 Default VINDPM Setting
        5. 7.3.4.5 Input Source Type Detection
          1. 7.3.4.5.1 D+/D– Detection Sets Input Current Limit
          2. 7.3.4.5.2 HVDCP Detection Procedure
          3. 7.3.4.5.3 Connector Fault Detection
      5. 7.3.5  Dual-Input Power Mux
        1. 7.3.5.1 ACDRV Turn On Condition
        2. 7.3.5.2 VBUS Input Only
        3. 7.3.5.3 One ACFET-RBFET
        4. 7.3.5.4 Two ACFETs-RBFETs
      6. 7.3.6  Buck-Boost Converter Operation
        1. 7.3.6.1 Force Input Current Limit Detection
        2. 7.3.6.2 Input Current Optimizer (ICO)
        3. 7.3.6.3 Maximum Power Point Tracking for Small PV Panel
        4. 7.3.6.4 Pulse Frequency Modulation (PFM)
        5. 7.3.6.5 Device HIZ State
      7. 7.3.7  USB On-The-Go (OTG)
        1. 7.3.7.1 OTG Mode to Power External Devices
        2. 7.3.7.2 Backup Power Supply Mode
        3. 7.3.7.3 Backup Mode with Dual Input Mux
      8. 7.3.8  Power Path Management
        1. 7.3.8.1 Narrow VDC Architecture
        2. 7.3.8.2 Dynamic Power Management
      9. 7.3.9  Battery Charging Management
        1. 7.3.9.1 Autonomous Charging Cycle
        2. 7.3.9.2 Battery Charging Profile
        3. 7.3.9.3 Charging Termination
        4. 7.3.9.4 Charging Safety Timer
        5. 7.3.9.5 Thermistor Qualification
          1. 7.3.9.5.1 JEITA Guideline Compliance in Charge Mode
          2. 7.3.9.5.2 Cold/Hot Temperature Window in OTG Mode
      10. 7.3.10 Integrated 16-Bit ADC for Monitoring
      11. 7.3.11 Status Outputs ( STAT, and INT)
        1. 7.3.11.1 Charging Status Indicator (STAT Pin)
        2. 7.3.11.2 Interrupt to Host ( INT)
      12. 7.3.12 Ship FET Control
        1. 7.3.12.1 Shutdown Mode
        2. 7.3.12.2 Ship Mode
        3. 7.3.12.3 System Power Reset
      13. 7.3.13 Protections
        1. 7.3.13.1 Voltage and Current Monitoring
          1. 7.3.13.1.1  VAC Over-voltage Protection (VAC_OVP)
          2. 7.3.13.1.2  VBUS Over-voltage Protection (VBUS_OVP)
          3. 7.3.13.1.3  VBUS Under-voltage Protection (POORSRC)
          4. 7.3.13.1.4  System Over-voltage Protection (VSYS_OVP)
          5. 7.3.13.1.5  System Short Protection (VSYS_SHORT)
          6. 7.3.13.1.6  Battery Over-voltage Protection (VBAT_OVP)
          7. 7.3.13.1.7  Battery Over-current Protection (IBAT_OCP)
          8. 7.3.13.1.8  Input Over-current Protection (IBUS_OCP)
          9. 7.3.13.1.9  OTG Over-voltage Protection (OTG_OVP)
          10. 7.3.13.1.10 OTG Under-voltage Protection (OTG_UVP)
        2. 7.3.13.2 Thermal Regulation and Thermal Shutdown
      14. 7.3.14 Serial Interface
        1. 7.3.14.1 Data Validity
        2. 7.3.14.2 START and STOP Conditions
        3. 7.3.14.3 Byte Format
        4. 7.3.14.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 7.3.14.5 Target Address and Data Direction Bit
        6. 7.3.14.6 Single Write and Read
        7. 7.3.14.7 Multi-Write and Multi-Read
    4. 7.4 Device Functional Modes
      1. 7.4.1 Host Mode and Default Mode
      2. 7.4.2 Register Bit Reset
    5. 7.5 Register Map
      1. 7.5.1 I2C Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 PV Panel Selection
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Input (VBUS / PMID) Capacitor
        4. 8.2.2.4 Output (VSYS) Capacitor
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
Data Sheet

BQ25798 I2C Controlled, 1 to 4-Cell, 5A Buck-Boost Battery Charger with Dual-Input Selector, MPPT for Solar Panels and Fast Backup Mode