SLUSDV2A May 2020 – May 2021 BQ25798
When battery charging is enabled (EN_CHG bit =1 and CE pin is LOW), the device autonomously completes a charging cycle without host involvement. The device default charging parameters are listed in Table 8-9. The host can always control the charging operation and optimize the charging parameters by writing to the corresponding registers through I2C.
|Charging voltage (REG01_Charge_Voltage_Limit)||4.2 V (1S), 8.4 V (2S), 12.6 V (3S), 16.8 V (4S)|
|Recharging voltage threshold (VRECHG)||200 mV|
|Fast charge current (REG03_Charge_Current_Limit)||2 A (1S and 2S), 1 A (3S and 4S)|
|Pre-charge current (IPRECHG)||120 mA|
|Trickle charge current (fixed value)||100 mA|
|Termination current (ITERM)||200 mA|
|Temperature profile (REG17_NTC_Control_0, REG18_NTC_Control_1)||JEITA|
|Fast charge safety timer (CHG_TMR)||12 hours|
|Pre-charge safety Timer (PRECHG_TMR)||2 hours|
|Trickle charge safety Timer (fixed value)||1 hour|
A new charge cycle starts when the following conditions are valid:
The charger automatically terminates the charging cycle when the charging current is below termination threshold, charge voltage is above recharge threshold, and the device is not in DPM mode or thermal regulation. When a fully charged battery voltage is discharged below recharge threshold (threshold selectable via VRECHG[1:0] bits), the device automatically starts a new charging cycle. After the charging terminates, toggling either CE pin or EN_CHG bit initiates a new charging cycle.
The STAT output indicates the charging status of: charging (LOW), charging complete or charging disabled (HIGH) or charging fault (Blinking). The STAT output can be disabled by setting DIS_STAT = 1. In addition, the status register (CHG_STAT) indicates the different charging phases as:
When the charger transitions to any of these states, including when the charge cycle completes, an INT is asserted to notify the host.