SNAS800 Data sheet | TI.com

SNAS800B July 2021 – February 2024 LMX1204

PRODUCTION DATA

Package Options

Mechanical Data (Package|Pins)

RHA|40
- MPQF135D

Thermal pad, mechanical data (Package|Pins)

RHA|40
- QFND650

Orderable Information

5.8 Typical Characteristics

Noise Floor = –161 dBc/Hz, 1/f Noise = –154 dBc/Hz @ 10 kHz, Integrates to 28 fs jitter from 100 Hz to 6 GHz offset

Figure 5-2 Buffer Phase Noise Plot at 6 GHz Output

Noise Floor = –160.5 dBc/Hz, 1/f Noise = –154 dBc/Hz @ 10 kHz, Integrates to 30 fs jitter from 100 Hz to 6 GHz offset

Figure 5-4 Divide by 2 Phase Noise Plot at 6 GHz Output

Figure 5-6 Multiplier Phase Noise Plot at 6 GHz Output

Figure 5-8 Noise Floor in Buffer Mode

Figure 5-10 Noise Floor in Divide by 2 Mode

Applies to all modes except divider mode with odd divide (which has slightly lower power).

Figure 5-12 Single-Ended Output Power

Note: CLKOUTx_PWR=7

Figure 5-14 CLKOUT Waveform at 1 GHz

Figure 5-16 Second Harmonic in Buffer Mode

Figure 5-18 Second Harmonic in Divide by 2 Mode (Single-Ended)

Note: Output is differential.

Figure 5-20 Multiplier Sub-Harmonics (Harmonic Frequency = Output Frequency / M )

Figure 5-22 Multiplier Intermodulation Spur (MULT=2)

Measured in power-down mode to make Junction Temperature = Ambient temperature.

Figure 5-24 Temperature Sensor Readback

Figure 5-26 Output to Output Skew

Figure 5-28 SYSREF Delay vs. Temperature and Code (Fout = 10 GHz)

Figure 5-30 CLKIN S11 Magnitude

Stated input power is applied at each pin.

Figure 5-3 Noise Floor in Buffer Mode

Stated input power is applied at each pin.

Figure 5-5 Noise Floor With Divide by 2

Note: Input power in graph is differential.

Figure 5-7 Noise Floor in Multiply x2 Mode

Figure 5-9 Noise Floor in x2 Multiplier Mode

Figure 5-11 Noise Floor in Divider Mode

CLKOUTx_PWR = 7

Figure 5-13 Single-Ended Output Power

Note: CLKOUTx_PWR=7

Figure 5-15 CLKOUT Waveform at 3 GHz

Figure 5-17 Second Harmonic in Divide Mode (Single-Ended)

Figure 5-19 Second Harmonic in Multiply X2 Mode (Differential)

Figure 5-21 Multiplier 1/2 Sub-Harmonic in X2 Mode

Figure 5-23 Multiplier Intermodulation (M+1)/M Spur

Over 30 devices and 3 corner lots, propagation delay varied 1.1 ps over process and 7 ps overall when the temperature is held at a constant 25°C.

Figure 5-25 Propagation Delay

Main source of skew variation is frequency and measurement error. Other observed sources of variation include about 3 ps over process corners and 1.5 ps over temperature.

Figure 5-27 Output to Output Skew Variation for CLKOUT0 to CLKout3

Figure 5-29 SYSREF Delta Delay vs. Temperature and Code (Fout=10 GHz)

Figure 5-31 CLKIN S11 Phase