SBOS487B June 2009 – March 2020 PGA280
PRODUCTION DATA.
REGISTER
(Decimal, [Hex])(4) |
aaaa
(Binary) |
R/W | B7 | B6 | B5 | B4 | B3 | B2 | B1 | B0 | DESCRIPTION | RESET VALUES(2) |
---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | 0000 | W/R | G4 | G3 | G2 | G1 | G0 | MUX2 | MUX1 | MUX0 | Gain and optional MUX register | 0000 0000b |
1 | 0001 | W | SftwrRstNote2x | Write-only register, soft reset, write 1 | 0000 0000b | |||||||
2 | 0010 | W/R | CP6 | CP5 | CP4 | CP3 | CP2 | CP1 | CP0 | SPI-MODE selection to GPIO-pin | 0000 0000b | |
3 | 0011 | W/R | BUFTIM5 | BUFTIM4 | BUFTIM3 | BUFTIM2 | BUFTIM1 | BUFTIM0 | Set BUF time-out | 0001 1001b | ||
4 | 0100 | W/R | CHKerr | IARerr | BUFA | ICAerr | EF | OUTerr | GAINerr | IOVerr | Error Register; reset error bit: write 1 | 0000 0000b |
5 | 0101 | W/R | GPIO6 | GPIO5 | GPIO4 | GPIO3 | GPIO2 | GPIO1 | GPIO0 | GPIO Register Data force out or sense | 0000 0000b | |
6 | 0110 | W/R | SW-A1 | SW-A2 | SW-B1 | SW-B2 | SW-C1 | SW-C2 | SW-D12 | Input switch control 1 | 0110 0000b | |
7 | 0111 | W/R | SW-F1 | SW-F2 | SW-G1 | SW-G2 | Input switch control 2 | 0000 0000b | ||||
8 | 1000 | W/R | DIR6 | DIR5 | DIR4 | DIR3 | DIR2 | DIR1 | DIR0 | Configure pin to out = 1 or in = 0 | 0000 0000b | |
9 | 1001 | W/R | ECS6 | ECS5 | ECS4 | ECS3 | ECS2 | ECS1 | ECS0 | Extended CS mode (1 = enable) | 0000 0000b | |
10 [A] | 1010 | W/R | MUX-D dis | IARerr dis | BUFAPol at pin | ICAerr dis | ED BUFA suppress | OUTerr dis | GAINerr dis | IOVerr dis | Various configuration settings | 0000 0000b |
11 [B] | 1011 | W/R | LTD | FLGTIM3 | FLGTIM2 | FLGTIM1 | FLGTIM0 | Reserved | CHKsumE | Various configuration settings | 0001 0000b | |
12 [C] | 1100 | W/R | OSCout | SYNCin | BUFAout | BUFTin | EFout | MUX2 | MUX1 | MUX0 | Special function register | 0000 0000b |
PIN | GPIO6 | GPIO5 | GPIO4 | GPIO3 | GPIO2 | GPIO1 | GPIO0 | Register bit reference to GPIO pin(3) |