SBOS487B June 2009 – March 2020 PGA280
As shown in Figure 54, the PGA280 has seven multi-function pins labeled GPIO0 through GPIO6. These pins can function as general purpose input-output (GPIO) pins either to read a digital input or to output a digital signal as an interrupt or control. GPIO functions are controlled through Register 5 and Register 8.
These pins can also be programmed to have additional special functions for the PGA280. Each of these seven pins can be used as an output for the extended chip select function (ECS), using the PGA280 to redirect the SPI communications to other connected devices. CS Configuration Mode is enabled through Register 9. Additionally, Register 2 controls the clock polarity (CP) of each ECS. For each bit set to 1, a positive edge of SCLK follows CS (CP = 0); for each bit set to 0, a negative edge of SCLK follows CS (CP = 1).
Together with the GPIO and ECS functions, the seven pins can perform more specialized input and output tasks as controlled by Register 12, the Special Functions Register.
GPIO0, GPIO1, and GPIO2 can be used to control an external multiplexer. If the MUX function is enabled in the first three bits of Register 12, the output value on the MUX pins is controlled through Register 0. This configuration allows for simultaneous control of the PGA280 gain and external multiplexer settings by writing to a single register.
GPIO4 can be used as an input to trigger the current buffer. The low-to-high edge of a pulse starts the buffer with a delay of three to four clock cycles. If held high, the buffer [BUFA] remains active. The active time is extended by a minimum of three to four clock cycles in addition to the time set with FLAGTIM.
GPIO5 can be configured as an output to indicate a buffer active condition. The polarity is controlled by BUFApol of bit 5 in Register 10.
GPIO6 can be configured as either an output or an input with the Special Functions Register. With Bit 7, OSCOUT connects the internal oscillator to GPIO6. With Bit 6, SYNCIN allows an external oscillator to provide the master clock to the PGA280.
To use any of these functions, Register 8 must first be set to 0 for input or to 1 for an output (for GPIO, ECS, or special function).
Once set, any 1s in Register 9 supersede the GPIO function for the related pin, allowing for CS configuration.
Likewise, any 1s in Register 12 supersede the GPIO function and CS configuration, allowing for any of the pin-specific special functions to operate.