SLLS890C August 2008 – April 2024 TL28L92
PRODUCTION DATA
This register stores the Interrupt Vector. It is initialized to 0x0F on hardware reset and is usually changed from this value during initialization of the TL28L92. The contents of this register is placed on the data bus when IACKN is asserted LOW or a read of address 0xC is performed.
When not operating in the 68xxx mode, this register may be used as a general purpose one byte storage register. A convenient use could be to store a shadow of the contents of another TL28L92 register (IMR, for example).
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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interrupt vector (68xxx mode) or one byte storage (80xxx mode) |