DLPS039F December 2015 – April 2019 TPS99000-Q1
The TPS99000-Q1 includes a 12-bit analog to digital converter block with a 32:1 input mux and dual sample-and-hold circuits. It also includes a custom high speed serial control interface which when used in tandem with the DLPC230-Q1 provides up to 63 DMD sequence-aligned samples per frame, with hardware-based sample timing and shadow-latched results. The hardware sample timing and shadow latch relieves the DLPC230-Q1 processor from ADC timing tasks, freeing up processor resources for other uses.
Figure 32 illustrates the structure of the ADC controller blocks in the two ASICs.
The ADC block contains a dedicated channel reserved for differential low side LED current measurements. Two sample-and-hold circuits are included to support paired LED current/voltage measurements. (Note: when performing paired samples, they are sampled simultaneously, but converted sequentially, so the conversion time doubles). An additional seven external ADC channels are supported. The remaining 24 multiplexer inputs enable measurement of internal TPS99000-Q1 operating parameters.
The DLPC230-Q1 contains a custom ADC control block that supports up to 63 ADC samples per frame. The samples are aligned with DMD sequencer activity, configurable through system configuration tools. This alignment makes measurement of specific light pulses (LED current, voltage, and TIA output) within a sequence possible, with precise repeatability from frame to frame. Up to 63 samples per frame are supported. The 63 sample buffer includes a shadow latch that updates each frame. This latched output is held constant for a complete frame time, allowing time for the DLPC230-Q1 to collect and process the information.
A reference voltage output is also included in the ADC block. This provides a low current voltage reference which matches the reference used by the ADC for conversion. This external reference can be used to bias thermistor voltage dividers, providing greater accuracy than would be possible using a mix of external and internal references. (Note: Current supply is limited. Loads which exceed the specified current maximum rating on ADC_VREF output may result in unpredictable ADC behavior). Regardless of whether the reference voltage is used, a 0.1uF capacitor should be connected from this pin to ground.