SPRADB7 September   2023 AM2431 , AM2432 , AM2434 , AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM2732 , AM2732-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 How to Use This Application Note
    2. 1.2 Glossary
  5. 2Thermal Resistance Overview
    1. 2.1 Junction Vs. Ambient Temperature
    2. 2.2 Package Defined Thermal Resistance Characteristics
    3. 2.3 Board Defined Thermal Resistances
  6. 3Board Design Choices that Affect Thermal Performance
    1. 3.1 Thermal Vias
    2. 3.2 Board Size
    3. 3.3 Air Flow, Heat Sinking, and Enclosures
    4. 3.4 Copper Thickness
    5. 3.5 Relative Position of Heat Emitters
    6. 3.6 Layer Count
    7. 3.7 Breaks in Thermal Pathing
  7. 4Thermal Design Best Practices Review
  8. 5AM263x EVM Thermal Comparison with Data
    1. 5.1 Test Setup and Materials
    2. 5.2 Measurement Logging Software
    3. 5.3 AM263x EVM Comparison
    4. 5.4 Measurement Results
      1. 5.4.1 Lid Temperature Readings
      2. 5.4.2 Power Readings over Temperature
      3. 5.4.3 Calculated Thermal Resistance Values
      4. 5.4.4 Recorded Junction and Ambient Temperatures
      5. 5.4.5 Calculated Junction Temperature at Ambient Temperature Extremes
  9. 6Using the Thermal Model
  10. 7References

3.7 Breaks in Thermal Pathing

Similar to how narrowing a water pipe will bottleneck the flow of water, traces and via cutouts can lead to bottlenecking of the thermal dissipation. Each ground layer on the board should be reviewed to make sure that there are no breaks in the thermal pathing. Multiple vias together in a line or array can create a cutout on the ground layer that will negatively impact the thermal flow away from the SoC.

For best thermal performance:

  • Review each ground layer and ensure there are no copper pour cutouts that would impede the flow of heat.