SLAAEH8 October   2024 AFE781H1 , AFE782H1 , AFE881H1 , AFE882H1 , DAC8740H , DAC8741H , DAC8742H

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 The 4-20mA Loop
    2. 1.2 The HART Protocol
      1. 1.2.1 Adding HART to the 4-20mA Loop
      2. 1.2.2 HART FSK
  5. 2AFE881H1 HART Modem
    1. 2.1 AFE881H1 HART Transmitter
    2. 2.2 Detailed Schematic
      1. 2.2.1 Input Protection
      2. 2.2.2 Startup Circuit
      3. 2.2.3 Voltage-to-Current Stage
      4. 2.2.4 Voltage-to-Current Calculation
      5. 2.2.5 HART Signal Transmission
      6. 2.2.6 HART Input Protection
      7. 2.2.7 Current Consumption
      8. 2.2.8 HART Transmitter Board
      9. 2.2.9 HART Protocol Stack
  6. 3HART Testing and Registration
    1. 3.1  HART History and the FieldComm Group
    2. 3.2  HART Testing Overview
      1. 3.2.1 HART Protocol Specifications
      2. 3.2.2 HART Protocol Test Specifications
      3. 3.2.3 Remote Transmitter Device Testing
    3. 3.3  HART Test Equipment
    4. 3.4  HART Physical Layer Testing
      1. 3.4.1 FSK Sinusoid Test
      2. 3.4.2 Carrier Start and Stop Time Tests
      3. 3.4.3 Carrier Start and Stop Transient Tests
      4. 3.4.4 Output Noise During Silence
      5. 3.4.5 Analog Rate of Change Test
      6. 3.4.6 Receive Impedance Test
      7. 3.4.7 Noise Sensitivity Test
      8. 3.4.8 Carrier Detect Test
    5. 3.5  Data Link Layer Tests
      1. 3.5.1 Data Link Layer Test Specifications
      2. 3.5.2 Data Link Layer Test Logs
    6. 3.6  Universal Command Tests
    7. 3.7  Common-Practice Command Tests
    8. 3.8  Device Specific Command Tests
    9. 3.9  HART Protocol Test Submission
    10. 3.10 HART Registration
  7. 4Other TI HART Modem Designs
  8. 5Summary
  9. 6Acknowledgments
  10. 7References

2.2.9 HART Protocol Stack

As a HART modem, AFE881H1 organizes the physical layer of the transmissions. The physical layer refers to the HART FSK signal superimposed on the 4-20mA loop. The AFE881H1 translates this signal for the microprocessor to UART or SPI. However, the firmware programmed into the microprocessor sets the framing for communication or interprets the HART commands. This firmware is the known as HART protocol stack.

The HART stack manages the communication between devices in the of the protocol. The firmware checks that messages are delivered correctly and handles error checking and correction. The stack also is responsible for the correct responses to application commands in the HART protocol.

For this design, the HART stack was written for the MSP430FR5969. This firmware for this transmitter was developed by Smart Embedded Systems (SES) of Pleasanton, CA. For more information about SES services, see www.smartembeddedsystems.com.