SLAAEI9A December   2023  – May 2025 MSPM0C1103 , MSPM0C1103-Q1 , MSPM0C1104 , MSPM0C1104-Q1 , MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3105 , MSPM0G3105-Q1 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3505-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1 , MSPM0H3216 , MSPM0H3216-Q1 , MSPM0L1105 , MSPM0L1106 , MSPM0L1116 , MSPM0L1117 , MSPM0L1227 , MSPM0L1227-Q1 , MSPM0L1228 , MSPM0L1305 , MSPM0L1306 , MSPM0L1345

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1MSPM0 Portfolio Overview
    1. 1.1 Introduction
    2. 1.2 Portfolio Comparison of STM8 MCUs to MSPM0 MCUs
  5. 2Ecosystem And Migration
    1. 2.1 Ecosystem Comparison
      1. 2.1.1 MSPM0 Software Development Kit (MSPM0 SDK)
      2. 2.1.2 IDE Supported By MSPM0
      3. 2.1.3 SysConfig
      4. 2.1.4 Debug Tools
      5. 2.1.5 LaunchPad
    2. 2.2 Migration Process
      1. 2.2.1 Step 1: Choose The Right MSPM0 MCU
      2. 2.2.2 Step 2. Set Up IDE And Quick Introduction of CCS
        1. 2.2.2.1 Set Up IDE
        2. 2.2.2.2 Quick Introduction of CCS
      3. 2.2.3 Step 3. Set Up MSPM0 SDK And Quick Introduction of MSPM0 SDK
        1. 2.2.3.1 Set Up MSPM0 SDK
        2. 2.2.3.2 Quick Introduction of SDK
      4. 2.2.4 Step 4: Software Evaluation
      5. 2.2.5 Step 5. PCB Board Design
      6. 2.2.6 Step 6. Mass Production
    3. 2.3 Example
  6. 3Core Architecture Comparison
    1. 3.1 CPU
    2. 3.2 Embedded Memory Comparison
      1. 3.2.1 Flash and EEPROM Features
      2. 3.2.2 Flash and EEPROM Organization
        1. 3.2.2.1 Flash and EEPROM Regions
        2. 3.2.2.2 NONMAIN Memory of MSPM0
      3. 3.2.3 Embedded SRAM
    3. 3.3 Power UP and Reset Summary and Comparison
    4. 3.4 Clocks Summary and Comparison
      1. 3.4.1 Oscillators
      2. 3.4.2 Clock Signal Comparison
    5. 3.5 MSPM0 Operating Modes Summary and Comparison
      1. 3.5.1 Operating Modes Comparison
      2. 3.5.2 MSPM0 Capabilities in Lower Modes
      3. 3.5.3 Entering Lower-Power Modes
      4. 3.5.4 Low-Power Mode Code Examples
    6. 3.6 Interrupts and Events Comparison
      1. 3.6.1 Interrupts and Exceptions
        1. 3.6.1.1 Interrupt Management of MSPM0
        2. 3.6.1.2 Interrupt Controller (ITC) of STM8
      2. 3.6.2 Event Handler of MSPM0
      3. 3.6.3 Event Management Comparison
    7. 3.7 Debug and Programming Comparison
      1. 3.7.1 Debug Mode Comparison
      2. 3.7.2 Programming Mode Comparison
        1. 3.7.2.1 Bootstrap Loader (BSL) Programming Options
  7. 4Digital Peripheral Comparison
    1. 4.1 General-Purpose I/O (GPIO, IOMUX)
    2. 4.2 Universal Asynchronous Receiver-Transmitter (UART)
    3. 4.3 Serial Peripheral Interface (SPI)
    4. 4.4 Interintegrated Circuit Interface (I2C)
    5. 4.5 Timers (TIMGx, TIMAx)
    6. 4.6 Windowed Watchdog Timer (WWDT)
  8. 5Analog Peripheral Comparison
    1. 5.1 Analog-to-Digital Converter (ADC)
    2. 5.2 Comparator (COMP)
    3. 5.3 Voltage References (VREF)
  9. 6Summary
  10. 7References
  11. 8Revision History

3.2.1 Flash and EEPROM Features

The MSPM0 and STM8 family of MCUs feature nonvolatile flash and EEPROM memory used for storing executable program code and application data. Table 3-2 shows the features of flash and EEPROM. Note that not all the devices have all features. For details, refer to the device-specific data sheet.

Table 3-2 Features of FLASH and EEPROM
Features STM8L and STM8S MSPM0L, MSPM0C and MSPM0H
Flash memory STM8Lxx ranges 2 KB to 64 KB
STM8Sxx ranges 4 KB to 128 KB		 MSPM0Lxx ranges 8 KB to 64 KB
MSPM0Cxx 8 KB or 64 KBMSPM0Hxx 32KB to 64KB
EEPROM up to 2 KB EEPROM emulation using Flash
Memory organization Block size (64 B/128 B)
Page size (a set of blocks)		 Word line (128B)
Sector size (1 KB)
Bank size (variable): Device up to 256 KB-1bank
Wait states 0 (fCPU ＜ 16MHz)
1 (fCPU ＞ 16MHz)		 0 (MCLK, CPUCLK ＜ 24MHz)
1 (MCLK, CPUCLK ＜ 48MHz)
Single word size 32 bits 64 bits (72 bits with ECC)
Programming mode Byte, single flash word, block Resolution Single flash word, 32-, 16-, or 8-bit
Multi-word 2, 4, or 8 words (up to 64 bytes)
Erase Block erase Sector erase
Bank erase (up to 256 KB)

Error code correction

 Supported Supported
Write Protection Yes Yes, static and dynamic
Read Protection Yes Yes
Erase and Write Cycles Program memory 100 100k (lower 32 KB) or 10k (above 32 KB)
Data memory 100k

In addition to the flash memory features listed in the previous table, the MSPM0 flash also has the following features:

  • In-circuit program and erase supported across the entire supply voltage range.
  • Interprogramming voltage generation.