Controlling the device via SPI can be handled via normal SPI mode, with one target and one register read and write, but for flexibility and to maximize throughput on the SPI bus, the device also supports alternative modes. Both broadcast and burst modes are supported to minimize overhead of the host MCU.

Normal unicast mode enables read and writes to one device and one register based on the hardware address and register address.

Global broadcast ignores the hardware address bits and implements the write command across all devices sharing a CS line. This allows the user to write defaults quickly for the whole system with one command.

Burst mode increments either the byte or bank address (depending on the mode) to write or read multiple registers with a single command. Byte burst mode increments the register address by 1, while bank burst mode increments to the next bank (device bank, channel A bank, channel B bank).

Burst mode and broadcast mode can be used together, to write the configuration to all devices in the system, across multiple registers, with one SPI command. SDI bytes are returned during write to validate the data written.

Note: In broadcast, the SPI SDO loop back to verify written data cannot be used.