SLLSFT1 October   2026 TIOM2212

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  L+ Supply Controller
        1. 7.3.1.1 Auto-retry feature
        2. 7.3.1.2 Current sense feature
      2. 7.3.2  C/Q Transceiver
        1. 7.3.2.1 CQ Driver Fault Detection
        2. 7.3.2.2 CQ Reverse Polarity Protection
        3. 7.3.2.3 CQ Current Source or Sink
        4. 7.3.2.4 CQ Receiver Output
        5. 7.3.2.5 CQ Receiver Threshold
        6. 7.3.2.6 CQ/RX Receiver Glitch Filter
      3. 7.3.3  High-side Switch (HSS) Gate Driver
      4. 7.3.4  DI Receiver
      5. 7.3.5  Reverse Polarity Protection
      6. 7.3.6  Thermal Warning and Shutdown
      7. 7.3.7  Clocking
      8. 7.3.8  Power Up Sequence (TIOM2212)
      9. 7.3.9  Device Functional Modes
        1. 7.3.9.1 IO-Link PHY Mode
          1. 7.3.9.1.1 Integrated Automated Sequences
        2. 7.3.9.2 UART Mode
        3. 7.3.9.3 Frame Handler Mode
        4. 7.3.9.4 Extended Frame Handler Mode
      10. 7.3.10 SPI Communication
      11. 7.3.11 SPI Modes and Frame Formats
      12. 7.3.12 Memory and Registry Maps
        1. 7.3.12.1 device Registers
        2. 7.3.12.2 channel Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Power Supply Recommendations
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

4 Pin Configuration and Functions

TIOM2212 RGZ (VQFN) Package, 48 Pin (Top View) Figure 4-1 RGZ (VQFN) Package, 48 Pin (Top View)
Table 4-1 Pin Functions
PIN NO PIN NAME TYPE DESCRIPTION
1 VL Supply 1.71V-5.5V logic supply.
2 A0 I Address input 0. Connect directly to VL or ground.
3 A1 I Address input 1. Connect directly to VL or ground.
4 XO O Crystal oscillator input. Connect a crystal between XI and XO to use crystal clocking. Leave unconnected if using the internal clock.
5 XI/CLKI I Crystal oscillator input. Connect a crystal between XI and XO to use crystal clocking. Can also be configured as clock input from adjacent device on start-up.
6 CLKO O Internal clock out, connect to CLKI of the next device when using multiple. To reduce the need for multiple crystal oscillators.
7 RESET I Active-low hardware reset input. Connect to VL through a pull-up resistor.
8 IRQ O Active-low hardware interrupt output. Connect to VL through a pull-up resistor.
9 SDI I SPI Serial Data Input. Data is captured on the positive edge of SCLK.
10 SDO O SPI Serial Data Output. Data is shifted out on the negative edge of SCLK.
11 SCLK I SPI Clock Input.
12 CS I SPI Chip Select Pin (active low).
13 LED1A O Channel A LED driver. Connect a current limiting resistor in series.
14 LED2A O Channel A LED driver. Connect a current limiting resistor in series.
15 RXDIA/LED3A O Channel A DI receiver output / configurable LED driver. When used as RX, connect to micro-controller as part of optional UART control. When used as LED driver, connect a current limiting resistor in series.
16 RXCQA/LED4A O Channel A C/Q receiver output / configurable LED driver. When used as RX, connect to micro-controller as part of optional UART control. When used as LED driver, connect a current limiting resistor in series.
17 TXENA/LED5A I Channel A optional UART C/Q transmit enable / configurable LED driver. When used as TX enable, connect to micro-controller as part of optional UART control. When used as LED driver, connect a current limiting resistor in series.
18 TXA/LED6A I Channel A optional UART C/Q transmit input / configurable LED driver. When used as TX input, connect to micro-controller as part of optional UART control. When used as LED driver, connect a current limiting resistor in series.
19 SNS_LPA O Channel A L+ current sense output. Connect resistor to ground.
20 SNS_CQA O Channel A C/Q current sense output. Connect resistor to ground.
21 LPA Supply Power supply input (24V nominal) to the device. Connect 100Ω in series with L+. Connect 1µF capacitor to LM (ground) as close to the device as possible.
22 GA O Channel A external gate driver control for L+. Connect to gate of external NMOS for reverse current blocking and L+ control.
23 SA I Channel A sense input for external gate driver control on L+. Connect across shunt resistor with VCCA.
24 VCCA Supply Channel A VCC supply input. Connect 1µF capacitor to LM (ground) as close to the device as possible. Internally shorted to VCCB.
25 CQG1A O Channel A external gate driver control for C/Q HSS. Connect to gate of external NMOS FET to enable high current, C/Q drive.
26 CQS1A I Channel A sense input for external gate driver control on C/Q high-side switch (HSS). Connect across shunt resistor with CQS2.
27 CQS2A I Channel A sense input for external gate driver control on C/Q high-side switch. Connect across shunt resistor with CQS1.
28 CQG2A O Channel A external gate driver control for C/Q HSS. Connect to gate of external NMOS to enable high current C/Q drive.
29 CQA I/O Channel A transceiver input/output
30 DIA I Channel A digital input, connect a 100Ω resistor in series.
31 D1B I Channel B digital input, connect a 100Ω resistor in series.
32 CQB I/O Channel B transceiver input/output
33 CGG2B O Channel B external gate driver control for C/Q HSS. Connect to gate of external NMOS to enable high current, C/Q drive.
34 CQS2B I Channel B sense input for external gate driver control on C/Q HSS. Connect across shunt resistor with CQS1.
35 CQS1B O Channel B sense input for external gate driver control on C/Q HSS. Connect across shunt resistor with CQS2.
36 CQG1B I Channel B external gate driver control for C/Q HSS. Connect to gate of external NMOS to enable high current C/Q drive.
37 VCCB Supply Channel B VCC supply input. Connect 1µF capacitor to LM (ground) as close to the device as possible. Internally shorted to VCCA
38 SB I Channel B sense input for external gate driver control on L+. Connect across shunt resistor with VCCA.
39 GB O Channel B external gate driver control for L+. Connect to gate of external NMOS for reverse current blocking and L+ control.
40 LPB Supply Power supply input (24V nominal) to the device. Connect 100Ω in series with L+. Connect 1µF capacitor to LM (ground) as close to the device as possible.
41 SNS_CQB O Channel B C/Q current sense output. Connect resistor to ground.
42 SNS_LPB O Channel B L+ current sense output. Connect resistor to ground.
43 TXB/LED6B I Channel B optional UART C/Q transmit input / configurable LED driver. When used as TX input, connect to micro-controller as part of optional UART control. When used as LED driver, connect a current limiting resistor in series.
44 TXENB/LED5B I Channel B optional UART C/Q transmit enable / configurable LED driver. When used as TX enable, connect to micro-controller as part of optional UART control. When used as LED driver, connect a current limiting resistor in series.
45 RXCQB\LED4B O Channel B C/Q receiver output / configurable LED driver . When used as RX, connect to micro-controller as part of optional UART control. When used as LED driver, connect a current limiting resistor in series.
46 RXD1B/LED3B O Channel B DI receiver output / configurable LED driver. When used as RX, connect to micro-controller as part of optional UART control. When used as LED driver, connect a current limiting resistor in series.
47 LED2B O Channel B LED driver. Connect a current limiting resistor in series.
48 LED1B O Channel B LED driver. Connect a current limiting resistor in series.
– Thermal Pad GND Connect to L- for maximum thermal and electrical performance.