SLLSFT1 October   2026 TIOM2212

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  L+ Supply Controller
        1. 7.3.1.1 Auto-retry feature
        2. 7.3.1.2 Current sense feature
      2. 7.3.2  C/Q Transceiver
        1. 7.3.2.1 CQ Driver Fault Detection
        2. 7.3.2.2 CQ Reverse Polarity Protection
        3. 7.3.2.3 CQ Current Source or Sink
        4. 7.3.2.4 CQ Receiver Output
        5. 7.3.2.5 CQ Receiver Threshold
        6. 7.3.2.6 CQ/RX Receiver Glitch Filter
      3. 7.3.3  High-side Switch (HSS) Gate Driver
      4. 7.3.4  DI Receiver
      5. 7.3.5  Reverse Polarity Protection
      6. 7.3.6  Thermal Warning and Shutdown
      7. 7.3.7  Clocking
      8. 7.3.8  Power Up Sequence (TIOM2212)
      9. 7.3.9  Device Functional Modes
        1. 7.3.9.1 IO-Link PHY Mode
          1. 7.3.9.1.1 Integrated Automated Sequences
        2. 7.3.9.2 UART Mode
        3. 7.3.9.3 Frame Handler Mode
        4. 7.3.9.4 Extended Frame Handler Mode
      10. 7.3.10 SPI Communication
      11. 7.3.11 SPI Modes and Frame Formats
      12. 7.3.12 Memory and Registry Maps
        1. 7.3.12.1 device Registers
        2. 7.3.12.2 channel Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Power Supply Recommendations
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

7.3.3 High-side Switch (HSS) Gate Driver

The device features high-side switch (HSS) gate drivers to provide additional drive on C/Q outputs. The gate drivers control the pins CQG1x and CQG2x to provide active current limiting, reverse polarity protection, and auto-retry functionality for the HSS. The current through the HSS is sensed using a sense resistor placed between CQS1x and CQS2x. The current through the sense resistor is actively controlled to ILIM = VTH/RSENSE. A default threshold of VTH = 15mV is set across the sense resistor. This threshold can be configured using HSS_CFG0 register (HSS_CLIM bits) to one of the following values: 15mV, 30mV, 60mV, and 120mV.

The CQx HSS controllers can be individually enabled using HSS_GATE_DRV_EN bit in HSS_CFG1 register for the corresponding channels.

The FET connected to CQG1x controls the HSS current value and state (ON/OFF) while the FET connected to CQG2x provides reverse polarity protection. The threshold for reverse polarity is set at 100mV across the sense resistor. The state of both FETs can be individually controlled using the HSS_CQG1_EN and HSS_CQG2_EN bits in HSS_CFG1.

All gate drivers support NFETs for lower overall system cost. These drivers are capable of switching external NFETs at speeds >10kHz.

Auto-retry feature

The HSS_CFG0 register can be used to configure the HSS current limits. HSS_TSC and HSS_TAR set the current blanking time and auto-retry time, respectively. If the HSS current exceed the ILIM set by HSS_CLIM bits, then an overcurrent fault is generated. The device supports two modes (set by HSS_AR_DIS) when the HSS exceeds HSS_CLIM. The device can either continue to supply current indefinitely until it reaches the thermal shutdown threshold, or it can operate in auto-retry mode. In auto-retry mode, the device supplies current equal to HSS_CLIM for a duration equal to the current blanking time, and then disables the output for a duration equal to the auto-retry time. As long as the HSS continues to exceed HSS_CLIM, this routine will repeat a number of times until it reaches the value set in the HSS_MAX_AR field (and it will repeat an infinite number of times if the value of this field is 0000b).

To further reduce the power dissipated in external NFETs during turn-on of loads that require large inrush currents (e.g., capacitive loads), the current limiter includes a dynamic blanking time mode that reduces the blanking time when the voltage across the FET is high, limiting the pulse energy during the initial turn-on phase. Dynamic blanking time mode is operational when the HSS output voltage is below 7V and must be enabled by setting the HSS_DYBL_EN bit in the HSS_CFG1 register.

Current sense feature

TIOM2212 provides current sensing feature for the HSS. The voltage across the sense resistor is converted into a current using GMSNS,HSS and sourced into the pin SNS_CQA/B. The GMSNS,HSS scales proportionally to VTH (15mV, 30mV, 60mV, 120mV) the setting. A resistor can be connected between SNS_CQA/B and LM pins to convert the current into a voltage which can be sensed by the Micro-controller ADC. Current sense feature can be enabled by setting HSS_SNS_EN bit in HSS_CFG1 register.